CY7C132, CY7C136
CY7C136A, CY7C142, CY7C146
Switching Waveforms (continued)
Figure 10. Busy Timing Diagram No. 2 (Address Arbitration)
Left Address Valid First:
ADDRESSL
ADDRESSR
BUSYR
Right Address Valid First:
ADDRESSR
ADDRESSL
BUSYL
tRC or tWC
ADDRESS MATCH
tPS
tBLA
tRC or tWC
ADDRESS MATCH
tPS
tBLA
ADDRESS MISMATCH
tBHA
ADDRESS MISMATCH
tBHA
CE
R/W
BUSY
Figure 11. Busy Timing Diagram No. 3 (Write with BUSY, Slave: CY7C142/CY7C146)
tPWE
tWB
tWH
Document #: 38-06031 Rev. *E
Page 10 of 15
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