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LCX026ALG データシートの表示(PDF) - Sony Semiconductor

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LCX026ALG
Sony
Sony Semiconductor Sony
LCX026ALG Datasheet PDF : 24 Pages
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LCX026ALG
2. LCD Panel Operations
[Description of basic operations]
A vertical driver, which consists of vertical shift registers, enable-gates and buffers, applies a selected pulse
to every 604 gate lines sequentially in a single horizontal scanning period. (in SVGA mode)
A horizontal driver, which consists of horizontal shift registers, gates and CMOS sample-and-hold circuits,
applies selected pulses to every 804 signal electrodes sequentially in a single horizontal scanning period.
These pulses are used to supply the sampled video signal to the row signal lines.
Vertical and horizontal shift registers address one pixel, and then Thin Film Transistors (TFTs; two TFTs) turn
on to apply a video signal to the dot. The same procedures lead to the entire 604 × 804 dots to display a
picture in a single vertical scanning period.
The data and video signals shall be input with the 1H-inverted system.
[Description of operating mode]
This LCD panel can change the active area by displaying a black frame to support various computer or video
signals. The active area is switched by MODE1, 2 and 3. However, the center of the screen is not changed.
The active area setting modes are shown below.
MODE1
L
MODE2
L
MODE3
H
L
H
L
L
H
H
H
L
L
Display mode
SVGA
804 × 604
PAL
762 × 572
VGA/NTSC
644 × 484
PC98
644 × 404
This LCD panel has the following functions to easily apply to various uses, as well as various broadcasting
systems.
Right/left inverse mode
Up/down inverse mode
These modes are controlled by two signals (RGT and DWN). The right/left and/or up/down setting modes are
shown below.
RGT
H
L
Mode
Right scan
Left scan
DWN
H
L
Mode
Down scan
Up scan
Right/left and/or up/down mean the direction when the Pin 1 marking is located at the right side with the pin
block upside.
To locate the active area in the center of the panel in each mode, polarity of the start pulse and clock phase for
both the H and V systems nust be varied. The phase relationship between the start pulse and the clock for
each mode is shown on the following pages.
– 17 –

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