CXA3268AR データシートの表示（PDF） - Sony Semiconductor
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CXA3268AR Datasheet PDF : 42 Pages
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CXA3268AR
Digital Block (including some analog block)
(Ta = –15 to +75°C, VDD = VCC1 = 3.7 to 3.6V)
Item
Symbol
Measurement
conditions
Min.
Typ.
Max.
Unit
Applicable
pins
High level input voltage
VIH
Low level input voltage
VIL
VDD × 0.7
V ∗1
VDD × 0.3 V
High level threshold voltage VT+1
Low level threshold voltage VT–1
2.6
V
0.6
V ∗2
Hysteresis voltage
VT+1 – VT–1
0.4
Schmitt buffer
High level threshold voltage VT+2
Low level threshold voltage VT–2
0.6
V
2.6
V
V ∗3
Hysteresis voltage
VT+2 – VT–2
0.2
V
High level input current
Low level input current
| IIH1 |
| IIL1 |
VI = VDD
VI = 0V
1.0
µA ∗4
1.0 µA
High level input current
Low level input current
| IIH2 |
| IIL2 |
VI = VDD
VI = 0V
3.0
µA ∗5
10
40
100 µA
High level input current
Low level input current
| IIH3 |
| IIL3 |
VI = VDD
VI = 0V
10
40
100
µA ∗6
3.0 µA
High level input current
Low level input current
| IIH4 |
| IIL4 |
VI = VDD
VI = 0V
1.0
µA ∗7
2.0 µA
Low level output voltage VOL1
IOL = 1mA
High level output voltage VOH1
IOH = –0.25mA
2.6
0.3
V ∗8
V
Low level output voltage VOL2
IOL = 2mA
High level output voltage VOH2
IOH = –0.5mA
2.6
0.3
V ∗9
V
Low level output voltage VOL3
IOL = 4mA
High level output voltage VOH3
IOH = –1mA
2.6
0.3
V ∗10
V
Low level output voltage
High level output voltage
Output leak current
VOL4
VOH4
| IOZ |
IOL = 1.5mA
IOH = –1.25mA
VDD – 0.5
High impedance status
0.4
V ∗11
V
1.0
µA ∗12
∗1 XCLR (Pin 25), CKI (Pin 22)
∗2 CSYNC/HD (Pin 5), VD (Pin 10)
∗3 SCK (Pin 14), SEN (Pin 15), SDAT (Pin 16)
∗4 CSYNC/HD (Pin 5), CKI (Pin 22)
∗5 XCLR (Pin 25)
∗6 VD (Pin 10)
∗7 SCK (Pin 14), SEN (Pin 15), SDAT (Pin 16)
∗8 DWN (Pin 11), WIDE (Pin 12), VCK (Pin 66), VST (Pin 67), RGT (Pin 68)
∗9 RPD (Pin 24), VDO (Pin 26), HDO (Pin 27), POF (Pin 45), HST (Pin 64), EN (Pin 65)
∗10 HCK1 (Pin 61), HCK2 (Pin 62)
∗11 CKO (Pin 21). However, when measuring the output pin (CKO), the input level of the input pin (CKI) should
be 0V or VDD.
∗12 RPD (Pin 24)
– 13 –
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