SN8P1808-12 データシートの表示（PDF） - Sonix Technology Co., Ltd
部品番号
コンポーネント説明
メーカー
SN8P1808-12 Datasheet PDF : 129 Pages
| |||
SN8P1800
8-bit micro-controller build-in 12-bit ADC + 72 dots LCD driver
Version
VER 1.90
VER 1.93
VER 1.94
Date
Sep. 2002
Feb. 2003
Sep. 2003
AMENDMENT HISTORY
Description
V1.90 first issue
1. Extend chip operating temperature from “0°C ~ +70°C” to “-20°C ~ +70°C”.
2. Change the description of ADD M,A instruction from “M M+A” to “M A+M”
3. Add ADC grade.
4. Change bit name and initial value of RBANK register.
5. Change “ACC can’t be access by “B0MOV” instruction” to “ACC can’t be access by
“B0MOV” instruction during the instant addressing mode”.
6. Correct the description of STKnH.
7. Correct the bit definition of INTEN register.
8. Change “The low-speed clock frequency is supplied through on-chip RC oscillator
circuit” to “The low-speed clock frequency is supplied through external low clock
oscillator (32.768K) by crystal or RC mode”.
9. Change all “internal low-speed clock” to “external low-speed clock”.
10. Correct the description of “TC0 CLOCK FREQUENCY OUTPUT” section.
11. Correct the description of “TC1 CLOCK FREQUENCY OUTPUT” section.
12. SCKMD = 1 means SIO is in SLAVE mode. SCKMD = 0 means SIO is in MASTER
mode.
13. Remove “SIO clock and SPI clock are compatible”.
14. Remove this line: “B0MOV A, P2”. P2 of SN8P1808 is output only.
15. Note: The clock source of LCD driver is external low clock.
16. Modify the description ADR register.
17. Modify ADB’s output data table.
18. Correct an error of template code: “b0bclr FWDRST” “b0bset FWDRST”.
19. Add a notice about OSCM register access cycle.
20. Add slow mode (high clock stop and LVD OFF) operating current.
1. Correct RAM Bank value.
2. Correct EOC description.
3. Correct watchdog timer overflow time.
4. Correct POP operand.
5. Correct ADCKS table.
6. Modify figure 11-1 (adjust circuit of LCD contrast) and related description.
7. Add new section about checksum calculate must avoid 04H~07H
8. Correct description of Port6 as I/O port in Chapter 10.
9. Add WTCKS bit in OSCM register
10. Add TC0CKS/TC1CKS in TC0M/TC1M
11. Reserved Last 16 word ROM addresses
SONiX TECHNOLOGY CO., LTD
Revision 1.94
Share Link: 