8535-31 データシートの表示（PDF） - Integrated Device Technology

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8535-31

LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/LVCMOS-TO-3.3V LVPECL FANOUT BUFFER

Integrated Device Technology 

Integrated

ICS8535-31

ICS8535-31

L S , 1- -4, C O / LOW SKEW,

Circuit

1-TOS-4y, sCtRemYSsT, IAnLcO. SCILLATOR/

LVCMOS-TO-3.3V

LVPOEWCL

FKAENWOUT

BUTOFFER

LVCMOS- -3.3V LVPECL F B TO

RYSTAL SCILLATORTSD

ANOUT UFFER

POWER CONSIDERATIONS

This section provides information on power dissipation and junction temperature for the ICS8535-31.

Equations and example calculations are also provided.

1. Power Dissipation.

The total power dissipation for the ICS8535-31 is the sum of the core power plus the power dissipated in the load(s).

The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.

NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.

• Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 60mA = 207.9mW

• Power (outputs)MAX = 30mW/Loaded Output pair

If all outputs are loaded, the total power is 4 * 30mW = 120mW

Total Power_MAX (3.465V, with all outputs switching) = 207.9mW + 120mW = 327.9mW

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the

device. The maximum recommended junction temperature for HiPerClockSTM devices is 125°C.

The

equation

for Tj

is

as

follows:

Tj

=

θ

JA

*

Pd_total

+ TA

Tj = Junction Temperature

θ

JA

=

Junction-to-Ambient

Thermal

Resistance

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

TA = Ambient Temperature

In

order

to

calculate

junction

temperature,

the

appropriate

junction-to-ambient

thermal

resistance

θ

JA

must

be

used.

Assuming

a

moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 7 below.

Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:

70°C + 0.328W * 66.6°C/W = 92°C. This is well below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,

and the type of board (single layer or multi-layer).

TABLE 7.

THERMAL

RESISTANCE

θ

JA

FOR

20-PIN

TSSOP,

FORCED

CONVECTION

θ

JA

by

Velocity

(Linear

Feet

per

Minute)

Single-Layer PCB, JEDEC Standard Test Boards

Multi-Layer PCB, JEDEC Standard Test Boards

0

114.5°C/W

73.2°C/W

200

98.0°C/W

66.6°C/W

500

88.0°C/W

63.5°C/W

NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

8535AG-31

www.icst.com/products/hiperclocks.html

9

IDT™ / ICS™ LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/ LVCMOS-TO-3.3V LVPECL FANOUT BUFFER

9

REV. B APRIL 29, 2005

ICS8535-31

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