AD5744BSUZ データシートの表示（PDF） - Analog Devices

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AD5744BSUZ

Dual Low Power CMOS Analog Front End with DSP Microcomputer

Analog Devices 

Preliminary Technical Data

SCLK

24

AD5744

48

SYNC

SDIN

SDO

DB23

DB0

DB23

INPUT WORD SPECIFIES

REGISTER TO BE READ

DB23

NOP CONDITION

UNDEFINED

SELECTED REGISTER DATA

CLOCKED OUT

Figure 4. Readback Timing Diagram

DB0

DB0

200µA

IOL

TO OUTPUT

PIN CL

50pF

VOH (MIN) OR

VOL (MAX)

200µA

IOH

Figure 5. Load Circuit for SDO Timing Diagram

Rev. PrE | Page 9 of 32

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