MAX820(1998) データシートの表示（PDF） - Maxim Integrated
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MAX820 Datasheet PDF : 16 Pages
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Microprocessor and Non-Volatile
Memory Supervisory Circuits
+5V RP*
CE
3
VCC
CE
MAX792
CE
MAX820
14 CE IN
CE OUT 13
CE
GND
12
* MAXIMUM RP VALUE DEPENDS ON
THE NUMBER OF RAMS.
MINIMUM RP VALUE IS 1kΩ
CE
CE
CE
CE
ACTIVE-HIGH CE
LINES FROM LOGIC
RAM 1
RAM 2
RAM 3
RAM 4
VCC
3
VCC
4.7k
1
RESET
MAX792
MAX820
GND
12
BUFFER
VCC
µP
RESET
TO OTHER
SYSTEM RESET
INPUTS
GND
Figure 11. Alternate CE Gating
Alternative Chip-Enable Gating
Using memory devices with both CE and CE inputs
allows the MAX792/MAX820 CE propagation delay
to be bypassed. To do this, connect CE IN to ground,
pull up CE OUT to VCC, and connect CE OUT to the CE
input of each memory device (Figure 11). The CE input
of each memory device then connects directly to the
chip-select logic, which does not have to be gated by
the MAX792/MAX820.
Interfacing to µPs with Bidirectional
Reset Inputs
µPs with bidirectional reset pins, such as the Motorola
68HC11 series, can contend with the MAX792/MAX820
RESET output. If, for example, the MAX792/MAX820 RESET
output is asserted high and the µP wants to pull it low,
indeterminate logic levels may result. To avoid this,
connect a 4.7kΩ resistor between the MAX792/MAX820
RESET output and the µP reset I/O, as in Figure 12.
Buffer the MAX792/MAX820 RESET output to other sys-
tem components.
Negative-Going VCC Transients
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going VCC
transients (glitches). It is usually undesirable to reset
the µP when VCC experiences only small glitches.
Figure 13 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
Figure 12. Interfacing to µPs with Bidirectional RESET Pins
going VCC pulses, starting at 5V and ending below the
reset threshold by the magnitude indicated (reset-
comparator overdrive). The graph shows the maximum
pulse width a negative-going VCC transient may typi-
cally have without causing a reset pulse to be issued.
As the amplitude of the transient increases (i.e., goes
farther below the reset threshold), the maximum allow-
able pulse width decreases. Typically, a VCC transient
that goes 100mV below the reset threshold and lasts for
30µs or less will not cause a reset pulse to be issued.
A 100nF bypass capacitor mounted close to the VCC
pin provides additional transient immunity.
100
80
VCC = 5V
TA = +25°C
60
40
20
0
10
100
1000
10,000
RESET COMPARATOR OVERDRIVE, (VTH - VCC) (mV)
Figure 13. Maximum Transient Duration without Causing a
Reset Pulse vs. Reset-Comparator Overdrive
14 ______________________________________________________________________________________
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