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QPP-034 データシートの表示(PDF) - Xemod -> Mprise

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QPP-034 Datasheet PDF : 3 Pages
1 2 3
Performance at 28VDC & 25ºC (continued)
Parameter
Symbol Min
Group (Signal) Delay
Transmission Phase Flatness
τd
4.7
CDMA(1) ACPR at 40W Pout AVG
-46
CDMA(1) ACPR at 20W Pout AVG
-52
CDMA(1) Drain Efficiency at 40W Pout AVG
CDMA(1) Drain Efficiency at 20W Pout AVG
η
20
η
13
Performance at 28VDC Over Temperature
Parameter
Symbol Min
Peak Envelope Power at 1 dB Compression (two-tone)
Gain at 200W PEP (two tone)
P-1
200
G
Gain Variation over frequency at 40W Output (single tone)
G
Input Return Loss (50 Ref) at 40W PEP (two tone)
IRL
Drain Efficiency at 200W PEP (two tone)
η
3rd Order IMD Product (2 tone at 200W PEP;1 MHz spacing)
Group (Signal) Delay
Transmission Phase Flatness
τd
4.65
(1) CDMA test signal is single carrier IS-95
Nom
0.5
-48
-53
21
15
Nom
-29
0.5
Max
4.9
1.0
Units
ns
degrees
dB
dB
%
%
Max
-27
4.95
1.0
Units
W
dB
dB
%
dBc
ns
degrees
Notes:
The "Preliminary" designation on this data sheet indicates this product has not yet entered the volume production stage.
The data supplied here is derived from engineering development and pilot production testing and may change.
This GR-version QuikPAC module has an internally regulated gate voltage that is preset at the factory. A voltage of +12VDC
(±1V) should be applied to each gate lead (pins 1 and 5). No further adjustment is required. Although the module will
operate with lower voltages applied, the internal regulator is not functioning and the specified performance may not be
achieved.
The internal gate voltage is thermally compensated to maintain constant quiescent current over the temperature range listed
in the data sheet. No compensation is provided for gain changes with temperature. This can only be provided with AGC
external to the module
Gate voltage must be applied coincident with or after application of the drain voltage to prevent potentially destructive
oscillations. Bias voltages should never be applied to a module unless it is terminated on both input and output.
The quiescent current set during manufacture will be within the range specified in the Performance section (nominal ±10%)
and is selected to balance IMD, input return loss, and efficiency. This setting is suitable for most applications. Modules with
different optimization profiles are available by special order.
Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some
applications may require energy storage on the drain leads to accommodate time-varying waveforms.
The RF leads are internally protected against DC voltages up to 100V. Care should be taken to avoid video transients that
may damage the active devices.
Xemod QuikPAC Data
QPP-034
www.xemod.com
Rev. A (10-17-01) Page 2 of 2

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