24LLC02T データシートの表示（PDF） - CERAMATE TECHNICAL

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24LLC02T

2K-Bits Serial EEPROM For Low Power

CERAMATE TECHNICAL 

24LLC02

2K-Bits Serial EEPROM For Low Power

BYTE WRITE OPERATION

In a complete byte write operation, the master transmits the slave address, word address, and one data byte to

the 24LLC02 slave device (see Figure 1-9).

Start Slave Address

Word Address

Data

Stop

A

A

A

C

C

C

K

K

K

Figure 1-9. Byte Write Operation

Following the Start condition, the master sends the device identifier (4 bits), the device address (3 bits), and an

R /W bit set to “0” onto the bus. Then the addressed 24LLC02 generates an ACK and waits for the next byte.

The next byte to be transmitted by the master is the word address. This 8-bit address

is written into the word address pointer of the 24LLC02.

When the 24LLC02 receives the word address, it responds by issuing an ACK and then waits for the next 8-bit

data. When it receives the data byte, the 24LLC02 again responds with an ACK.The master terminates the

transfer by generating a Stop condition, at which time the 24LLC02 begins the internal write cycle.

While the internal write cycle is in progress, all 24LLC02 inputs are disabled and the 24LLC02 does not respond

to additional requests from the master.

* All specs and applications shown above subject to change without prior notice.

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Rev 1.0 Dec. 26, 2001

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