M29W008B データシートの表示（PDF） - STMicroelectronics
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M29W008B Datasheet PDF : 30 Pages
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M29W008T, M29W008B
Table 16A. Write AC Characteristics, Chip Enable Controlled
(TA = 0 to 70°C, –20 to 85°C or –40 to 85°C)
M29W008T / M29W008B
Symbol Alt
Parameter
-90
VCC = 3.0V to 3.6V
CL = 30pF
-100
VCC = 2.7V to 3.6V
CL = 30pF
Min
Max
Min
Max
tAVAV
tWC Address Valid to Next Address Valid
90
100
tWLEL
tWS Write Enable Low to Chip Enable Low
0
0
tELEH
tCP Chip Enable Low to Chip Enable High
45
50
tDVEH
tDS Input Valid to Chip Enable High
45
50
tEHDX
tDH Chip Enable High to Input Transition
0
0
tEHWH
tWH Chip Enable High to Write Enable High
0
0
tEHEL
tCPH Chip Enable High to Chip Enable Low
30
30
tAVEL
tAS Address Valid to Chip Enable Low
0
0
tELAX
tAH Chip Enable Low to Address Transition
45
50
tGHEL
Output Enable High Chip Enable Low
0
0
tVCHWL
tVCS VCC High to Write Enable Low
50
50
tEHGL
tOEH Chip Enable High to Output Enable Low
0
0
tPHPHH (1,2) tVIDR RP Rise TIme to VID
500
500
tPLPX
tRP RP Pulse Width
tEHRL (1)
tBUSY Program Erase Valid to RB Delay
tPHWL (1)
tRSP RP High to Write Enable Low
Notes: 1. Sample only, not 100% tested.
2. This timing is for Temporary Block Unprotection operation.
500
500
90
90
4
4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
µs
POWER SUPPLY
Power Up
The memory Command Interface is reset on power
up to Read Array. Either E or W must be tied to VIH
during Power Up to allow maximum security and
the possibility to write a command on the first rising
edge of E and W. Any write cycle initiation is
blocked when Vcc is below VLKO.
Supply Rails
Normal precautions must be taken for supply volt-
age decoupling; each device in a system should
have the VCC rail decoupled with a 0.1µF capacitor
close to the VCC and VSS pins. The PCB trace
widths should be sufficient to carry the VCC pro-
gram and erase currents required.
21/30
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