MCP3201
Note: Unless otherwise indicated, VDD = VREF = 5V, VSS = 0V, fSAMPLE = 100 ksps, fCLK = 16*fSAMPLE, TA = +25°C.
500
450
400
350
VREF = VDD
All points at FCLK = 1.6 MHz, except
at VREF = VDD = 2.5V, FCLK = 800 kHz
300
250
200
150
100
50
0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VDD (V)
FIGURE 2-31:
IDD vs. VDD.
400
350
300
250
200
150
100
50
0
10
FIGURE 2-32:
VDD = VREF = 5V
VDD = VREF = 2.7V
100
1000
Clock Frequency (kHz)
10000
IDD vs. Clock Frequency.
100
90
80
70
VREF = VDD
All points at FCLK = 1.6 MHz, except
at VREF = VDD = 2.5V, FCLK = 800 kHz
60
50
40
30
20
10
0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
VDD (V)
FIGURE 2-34:
IREF vs. VDD.
100
90
80
70
60
50
40
30
20
10
0
10
VDD = VREF = 5V
VDD = VREF = 2.7V
100
1000
10000
Clock Frequency (kHz)
FIGURE 2-35:
IREF vs. Clock Frequency.
400
350
300
VDD = VREF = 5V
FCLK = 1.6 MHz
250
200
150
100
VDD = VREF = 2.7V
FCLK = 800 kHz
50
0
-50 -25
0
25
50
Temperature (°C)
75 100
FIGURE 2-33:
IDD vs. Temperature.
100
90
80
70
60
50
40
30
20
10
0
-50
VDD = VREF = 5V
FCLK = 1.6 MHz
VDD = VREF = 2.7V
FCLK = 800 kHz
-25
0
25
50
75 100
Temperature (°C)
FIGURE 2-36:
IREF vs. Temperature.
DS21290E-page 12
© 2008 Microchip Technology Inc.