HMP8156 データシートの表示（PDF） - Intersil

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HMP8156

NTSC/PAL Encoder

Intersil 

September 2003

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HMP8156

NTSC/PAL Encoder

Features

• (M) NTSC and (B, D, G, H, I, M, N, CN) PAL Operation

• ITU-R BT.601 and Square Pixel Operation

• Digital Input Formats

- 4:2:2 YCbCr

- 8-Bit or 16-Bit

- 4:4:4 RGB

- 16-Bit (5, 6, 5) or 24-Bit (8, 8, 8)

- Linear or Gamma-Corrected

- 8-Bit Parallel ITU-R BT.656

- Seven Overlay Colors

• Analog Output Formats

- Y/C + Two Composite

- RGB + Composite (SCART)

• Flexible Video Timing Control

- Timing Master or Slave

- Selectable Polarity on Each Control Signal

- Programmable Blank Output Timing

- Field Output

• Closed Caption Encoding for NTSC and PAL

• 2x Upscaling of SIF Video

• Four 2x Oversampling, 10-Bit DACs

• I2C Interface

• Verilog Models Available

Applications

• Multimedia PCs

• Video Conferencing

• Video Editing

• Related Products

- NTSC/PAL Encoders: HMP8170

- NTSC/PAL Decoders: HMP8117

Ordering Information

TEMP.

PART NUMBER RANGE (oC) PACKAGE

PKG. NO.

HMP8156CN

0 to 70 64 PQFP

Q64.14x14

HMP8156EVAL1 Daughter Card Evaluation Platform (Note)

HMP8156EVAL2 Frame Grabber Evaluation Platform (Note)

NOTE: Described in the Applications Section

Description

The HMP8156 NTSC and PAL encoder is designed for use

in systems requiring the generation of high-quality NTSC

and PAL video from digital image data.

YCbCr or RGB digital video data drive the P0-P23 inputs.

Overlay inputs are processed and the data is 2x upsampled.

The Y data is optionally lowpass filtered to 5MHz and drives

the Y analog output. Cb and Cr are each lowpass filtered to

1.3MHz, quadrature modulated, and summed. The result

drives the C analog output. The digital Y and C data are also

added together and drive the two composite analog outputs.

The YCbCr data may also be converted to RGB data to drive

the DACs, allowing support for the European SCART con-

nector.

The DACs can drive doubly-terminated (37.5Ω) lines, and

run at a 2x oversampling rate to simplify the analog output

filter requirements.

Table of Contents

Page

Functional Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . 2

Functional Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pixel Data Input Formats . . . . . . . . . . . . . . . . . . . . . . . . . 3

Input Processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pixel Input and Control Signal Timing . . . . . . . . . . . . . . . 5

Video Timing Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Video Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Analog Outputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Host Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Evaluation Kits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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Copyright © Intersil Americas Inc. 2003. All Rights Reserved.

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All other trademarks mentioned are the property of their respective owners.

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