HMP8156
As inputs, BLANK, HSYNC, and VSYNC are latched on the CLK2 while CLK is high. CLK is one-fourth the CLK2 fre-
rising edge of CLK2 while CLK is low. As outputs, HSYNC, quency.
VSYNC, and BLANK are output following the rising edge of
CLK2
CLK
P8-P15
P0-P7
OL0-OL2,
M1, M0
BLANK
(INPUT)
BLANK
(OUTPUT)
CLK2
CLK
P0-P15
OL0-OL2,
M1, M0
BLANK
(INPUT)
BLANK
(OUTPUT)
Y0
Y1
Y2
Y3
Y4
Y5
Cb 0
Cr 0
Cb 2
Cr 2
Cb 4
Cr 4
PIXEL 0 PIXEL 1 PIXEL 2 PIXEL 3 PIXEL 4 PIXEL 5
YN
Cr N-1
PIXEL N
FIGURE 3. PIXEL AND OVERLAY INPUT TIMING 6-BIT YCBCR WITHOUT 2X UPSCALING
RGB 0
RGB 1
RGB 2
RGB 3
RGB 4
RGB 5
PIXEL 0 PIXEL 1 PIXEL 2 PIXEL 3 PIXEL 4 PIXEL 5
RGB N
PIXEL N
FIGURE 4. PIXEL AND OVERLAY INPUT TIMING - 16-BIT RGB WITHOUT 2X UPSCALING
7