MC74HC540ADT データシートの表示（PDF） - ON Semiconductor
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MC74HC540ADT Datasheet PDF : 8 Pages
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MC74HC540A
Octal 3-State Inverting
Buffer/Line Driver/Line
Receiver
High–Performance Silicon–Gate CMOS
The MC74HC540A is identical in pinout to the LS540. The device
inputs are compatible with Standard CMOS outputs. External pull–up
resistors make them compatible with LSTTL outputs.
The HC540A is an octal inverting buffer/line driver/line receiver
designed to be used with 3–state memory address drivers, clock
drivers, and other bus–oriented systems. This device features inputs
and outputs on opposite sides of the package and two ANDed
active–low output enables.
The HC540A is similar in function to the HC541A, which has
noninverting outputs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 124 FETs or 31 Equivalent Gates
VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
OE1 A1 A2 A3 A4 A5 A6 A7 A8 GND
Figure 1. Pinout: 20–Lead Packages (Top View)
FUNCTION TABLE
Inputs
OE1 OE2 A
L
L
L
L
L
H
HXX
XHX
Z = High Impedance
X = Don’t Care
Output Y
H
L
Z
Z
http://onsemi.com
MARKING
DIAGRAMS
20
1
PDIP–20
N SUFFIX
CASE 783
20
1
SO–20
DW SUFFIX
CASE 751D
MC74HC540AN
AWLYYWW
HC540A
AWLYYWW
20
1
TSSOP–20
DT SUFFIX
CASE 948E
HC540A
ALYW
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
ORDERING INFORMATION
Device
Package Shipping
MC74HC540AN
PDIP–20 1440/Box
MC74HC540ADW
SOIC–WIDE 38/Rail
MC74HC540ADWR2 SOIC–WIDE 1000/Reel
MC74HC540ADT
TSSOP–20 75/Rail
MC74HC540ADTR2 TSSOP–20 2500/Reel
© Semiconductor Components Industries, LLC, 2001
1
June, 2001 – Rev. 8
Publication Order Number:
MC74HC540A/D
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