MC74F377J データシートの表示（PDF） - Motorola => Freescale
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MC74F377J Datasheet PDF : 3 Pages
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OCTAL D FLIP-FLOP WITH ENABLE
The MC74F377 is a high-speed 8-Bit Register. The register consists of
eight D-Type Flip-Flops with individual D inputs and Q outputs. The common
buffered clock (CP) input loads all flip-flops simultaneously when the Enable
(E) is LOW. This device is supplied in a 20-pin package.
• High Impedance NPN Base Inputs for Reduced Loading (20 µA in
HIGH and LOW States)
• Ideal for Addressable Register Applications
• Enable for Address and Data Synchronization Applications
• Eight Edge-Triggered D Flip-Flops
• Buffered Common Clock
• See: MC74F373 for Transparent Latch Version
MC74F374 for 3-State Version
CONNECTION DIAGRAM (TOP VIEW)
VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP
20 19 18 17 16 15 14 13 12 11
MC74F377
OCTAL D FLIP-FLOP
WITH ENABLE
FAST™ SCHOTTKY TTL
20
1
20
1
J SUFFIX
CERAMIC
CASE 732-03
N SUFFIX
PLASTIC
CASE 738-03
1
2
3
4
5
6
7
8
9 10
E Q0 D0 D1 Q1 Q2 D2 D3 Q3 GND
20
1
DW SUFFIX
SOIC
CASE 751D-03
ORDERING INFORMATION
MC74FXXXJ Ceramic
MC74FXXXN Plastic
MC74FXXXDW SOIC
FUNCTION TABLE
Inputs
Outputs
Load “1”
Operating Mode
CP
E
Dn
Qn
↑
l
h
H
Load “0”
↑
l
l
L
Hold (do nothing)
↑
h
X
No Change
X
H
X
No Change
H = HIGH voltage level steady state; h = HIGH voltage level one setup time prior to the LOW-to-HIGH Clock transition; L = LOW voltage level steady state; l =
LOW voltage level one setup time prior to the LOW-to-HIGH clock transition; X = Don’t Care; ↑ = LOW-to-HIGH clock transition
FAST AND LS TTL DATA
4-278
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