DM74LS373CW データシートの表示（PDF） - Fairchild Semiconductor

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DM74LS373CW

3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

Fairchild Semiconductor 

Connection Diagrams

DM74LS373

DM74LS374

Function Tables

DM74LS373

DM74LS374

Output

Enable

D

Output

Control

G

L

H

H

H

L

H

L

L

L

L

X

Q0

H

X

X

Z

Output

Clock

D

Control

L

↑

H

L

↑

L

L

L

X

H

X

X

H = HIGH Level (Steady State)

L = LOW Level (Steady State)

X = Don’t Care

Z = High Impedance State

↑ = Transition from LOW-to-HIGH level

Q0 = The level of the output before steady-state input conditions were established.

Logic Diagrams

Output

H

L

Q0

Z

DM74LS373

Transparent Latches

DM74LS374

Positive-Edge-Triggered Flip-Flops

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