DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

74LVX4245T データシートの表示(PDF) - STMicroelectronics

部品番号
コンポーネント説明
メーカー
74LVX4245T
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74LVX4245T Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
®
74LVX4245
OCTAL DUAL SUPPLY BUS TRANSCEIVER
s HIGH SPEED: tPD = 6 ns (TYP.) at VCC = 3.3V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 oC
s LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCCA (OPR) =4.5V to 5.5V (1.2V Data Retention)
s VCCB (OPR) = 2.7V to 3.6V (1.2VData
Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4245
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The LVX4245 is a dual supply low voltage CMOS
OCTAL BUS TRANSCEIVER fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology. Designed for use as
an interface between a 5V bus and a 3.3V bus in
mixed 5V/3.3V supply sistems, it achieves high
PRELIMINARY DATA
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74LVX424 5M
74LVX4245T
speed operation while maintaining the CMOS low
power dissipation.
This IC is intended for two-way asynchronous
communication between data buses; the direction
of data trasmission is determined by DIR input.
The enable input G can be used to disable the
device so that the buses are effectively isolated.
The A-port interfaces with the 5V bus, the B-port
with the 3.3V bus.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
PIN CONNECTION AND IEC LOGIC SYMBOLS
March 1999
1/10

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]