MC54F378 データシートの表示（PDF） - Motorola => Freescale
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MC54F378 Datasheet PDF : 3 Pages
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PARALLEL D REGISTER
WITH ENABLE
The MC54/74F378 is a 6-bit register with a buffered common enable. This
device is similar to the F174 but with common Enable rather than common
Master Reset.
The F378 consists of six edge-triggered D-type flip-flops with individual D
inputs and Q outputs. The Clock (CP) and Enable (E) inputs are common to
all flip-flops.
When the E input is LOW, new data is entered into the register on the LOW-
to-HIGH transition of the CP input. When the E input is HIGH the register will
retain the present data independent of the CP input. This circuit is designed
to prevent false clocking by transitions on the E input..
• 6-Bit High-Speed Parallel Register
• Positive Edge-Triggered D-Type Inputs
• Fully Buffered Common Clock and Enable Inputs
• Input Clamp Diodes Limit High-Speed Termination Effects
CONNECTION DIAGRAM (TOP VIEW)
VCC Q5 D5 D4 Q4 D3 Q3 CP
16 15 14 13 12 11 10 9
12345678
E Q0 D0 D1 Q1 D2 Q2 GND
FUNCTION TABLE
Inputs
E
CP
Dn
H
X
L
H
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance
Output
Qn
No Change
H
L
MC54/74F378
PARALLEL D REGISTER
WITH ENABLE
FAST™ SCHOTTKY TTL
16
1
J SUFFIX
CERAMIC
CASE 620-09
16
1
N SUFFIX
PLASTIC
CASE 648-08
16
1
D SUFFIX
SOIC
CASE 751B-03
ORDERING INFORMATION
MC54FXXXJ
MC74FXXXN
MC74FXXXD
Ceramic
Plastic
SOIC
LOGIC SYMBOL
14
13
11
6
4
3
1
D5
D4
Q5
Q4
D3
D2
Q3
Q2
D1
D0
E
Q1
Q0
CP
15
12
10
7
5
2
9
VCC = PIN 16
GND = PIN 8
FAST AND LS TTL DATA
4-173
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