UPA1812 データシートの表示（PDF） - NEC => Renesas Technology

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UPA1812

P-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING

NEC => Renesas Technology 

• ELECTRICAL CHARACTERISTICS (TA = 25 °C)

CHARACTERISTICS

SYMBOL

TEST CONDITIONS

Zero Gate Voltage Drain Current

IDSS

VDS = –30 V, VGS = 0 V

Gate Leakage Current

IGSS

VGS = ±20 V, VDS = 0 V

Gate Cut-off Voltage

VGS(off) VDS = –10 V, ID = –1 mA

Forward Transfer Admittance

| yfs | VDS = –10 V, ID = –2.5 A

Drain to Source On-state Resistance

RDS(on)1 VGS = –10 V, ID = –2.5 A

RDS(on)2 VGS = –4.5 V, ID = –2.5 A

RDS(on)3 VGS = –4.0 V, ID = –2.5 A

Input Capacitance

Ciss

VDS = –10 V

Output Capacitance

Coss

VGS = 0 V

Reverse Transfer Capacitance

Crss

f = 1 MHz

Turn-on Delay Time

td(on)

VDD = –10 V

Rise Time

tr

ID = –2.5 A

Turn-off Delay Time

td(off)

VGS(on) = –10 V

Fall Time

tf

RG = 10 Ω

Total Gate Charge

QG

VDS = –24 V

Gate to Source Charge

QGS ID = –5.0 A

Gate to Drain Charge

QGD

VGS = –10 V

Diode Forward Voltage

VF(S-D) IF = 5.0 A, VGS = 0 V

µ PA1812

MIN. TYP. MAX. UNIT

–10 µA

±10 µA

–1.0 –1.6 –2.5 V

1

8

S

29 39 mΩ

46 63 mΩ

52 69 mΩ

1500

pF

550

pF

270

pF

30

ns

160

ns

110

ns

80

ns

31

nC

4

nC

8

nC

0.76

V

TEST CIRCUIT 1 SWITCHING TIME

D.U.T.

RG

PG.

RG = 10 Ω

VGS

0

τ

τ = 1µ s

Duty Cycle ≤ 1 %

RL

VDD

VGS

VGS

Wave Form

10 %

0

VGS(on)

ID

90 %

ID

Wave Form

0 10 %

td(on)

ID

tr td(off)

90 %

90 %

10 %

tf

ton

toff

TEST CIRCUIT 2 GATE CHARGE

D.U.T.

IG = 2 mA

RL

PG.

50 Ω

VDD

2

Data Sheet D12967EJ1V0DS00

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