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T8110-BAL-DB データシートの表示(PDF) - Agere -> LSI Corporation

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T8110-BAL-DB Datasheet PDF : 222 Pages
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Ambassador T8110 PCI-Based H.100/H.110 Switch
and Packet Payload Engine
Data Sheet
May 2001
2 Pin Description
2.1 Interface Signals
Table 1. Interface Signals
Signal
I/O
PCI_AD
I/O
PCI_CBE#
I/O
PCI_CLK
In
PCI_DEVSEL#
I/O
PCI_FRAME#
I/O
PCI_GNT#
In
PCI_IDSEL
In
PCI_INTA#
Out
PCI_IRDY#
I/O
PCI_LOCK#
In
PCI_PAR
I/O
PCI_PERR#
I/O
PCI_REQ#
Out
PCI_RST#
In
PCI_SERR#
Out
PCI_STOP#
I/O
PCI_TRDY#
I/O
Width
32
4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Function
PCI bus address/data.
PCI bus command/byte enable.
PCI bus clock (33 MHz).
PCI bus device select.
PCI bus cycle frame.
PCI bus grant.
PCI bus initialization device select.
PCI bus interrupt.
PCI bus initiator ready.
PCI bus lock.
PCI bus parity.
PCI bus parity error.
PCI bus request.
PCI bus reset.
PCI bus system error.
PCI bus stop.
PCI bus target ready.
Table 2. Minibridge Interface Signals
Signal
MB_A
I/O Width
Minibridge Function
I/O
16 Address[15:0] out.
Microprocessor Interface Function
Address[15:0] in.
Note: Special power-on function
for PCI core EEPROM.
MB_D
MB_RD
MB_WR
MB_CS0
MB_CS1
MB_CS2
MB_CS3
MB_CS4
MB_CS5
MB_CS6
MB_CS7
MB_A[3] = EE_SK_OUT
MB_A[2] = EE_DI_OUT
MB_A[1] = EE_DO_IN
I/O
16 Data bus I/O.
I/O
1 Read strobe output.
I/O
1 Write strobe output.
I/O
1 Chip select 0 output.
I/O
1 Chip select 1 output.
I/O
1 Chip select 2 output.
I/O
1 Chip select 3 output.
I/O
1 Chip select 4 output.
I/O
1 Chip select 5 output.
Out
1 Chip select 6 output.
I/O
1 Chip select 7 output.
* Intel is a registered trademark of Intel Corporation.
Motorola is a registered trademark of Motorola, Inc.
Data bus in/out.
RDn(DSn) in.
WRn(R/Wn) in.
Address[16] in.
Address[17] in.
Address[18] in.
Address[19] in.
CSn in.
Word/byte select in.
RDY(DTACKn) out.
Intel*/Motorolaselect in.
8
Agere Systems Inc.

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