ML4818CP データシートの表示（PDF） - Fairchild Semiconductor

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ML4818CP

Phase Modulation/Soft Switching Controller

Fairchild Semiconductor 

PRODUCT SPECIFICATION

ML4818

Since the per cycle charge on RCRESET is proportional to how

early in the power cycle the over-current occurs, a reset will

occur more quickly under output short circuit conditions

(Figures 11a and 11b) than during a load surge (Figures 11c

and 11d).

When the soft start reset occurs, the output is inhibited and

the soft start capacitor is discharged. The output will remain

off until CRST discharges to 1.3V through RRST, providing a

reset delay. When the IC restarts, the error amplifier output

voltage is limited to the voltage at SOFT START, thus limit-

ing the duty cycle.

Under-Voltage Lockout

On power up, when VCC is below 16V, the IC draws very lit-

tle current (1.1mA typ.) and VREF is disabled. When VCC rises

above 16V, the IC becomes active and VREF is enabled and

will stay in that condition until VCC falls below 10.2V. (see

Figure 12).

1V

V(PIN 4)

3.4V

V(PIN 12)

Figure 11a, 11b. ILIMIT and Resulting RCRESET

Waveforms During Short Circuit

1V

V(PIN 4)

3.4V

V(PIN 12)

Figure 11c, 11d. ILIMIT and Resulting RCRESET

Waveforms During Load Surge

INHIBIT

OUTPUTS

POWER

DOWN

4V

TO LOGIC

CIRCUITS

5V

VREF

24

9V

VCC

INTERNAL

BIAS

20

Figure 12. Under-Voltage Lockout and Reference Circuits

70

68

66

64

62

60

58

56

54

52

50

–75

–25

25

75

125

175

TEMPERATURE

Figure 13. Supply Current vs. Temperature (°C)

REV. 1.0.3 6/21/01

9

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