M65669SP データシートの表示（PDF） - MITSUBISHI ELECTRIC

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M65669SP

PICTURE-IN-PICTURE SIGNAL PROCESSING

MITSUBISHI ELECTRIC  

PRELIMINARY

Notice ; This is not the final specification.

Some of information in this document are

subject to changes.

V3.1

MITSUBISHI DIGITAL TV ICs

M65669SP/FP

PICTURE-IN-PICTURE

SIGNAL PROCESSING

<Driving Method and Operating Specification for Serial Interface Data>

(1) Serial data transmission completion and start

A low-to-high transition of the DATA (serial data) line while the CLK (serial clock) is high, that completes the serial

transmission and makes the bus free.

A high-to-low transition of the DATA line while the CLK is high, that starts the serial transmission and waits for the

following CLK and DATA inputs.

(2) Serial data transmission

The data are transmitted in the most significant bit (MSB) first by one-byte unit on the DATA line successively. One-byte

data transmission is completed by 9 clock cycles, the former 8 cycles are for address/data and the latter one is for

acknowledge detection. (In reading state, ACK is 'H' under these two conditions ; 1) the coincidence of two address data for

the address data transmission, 2) the completion of 8-bit setting data transfer. In writing state, ACK is 'H' with the address

coincidence and ACK is 'L' for detecting acknowledge input from the master (micro processor) after sending 8-bit setting

data.)

For address/data transmission, DATA must change while CLK is 'L'. (The data change while CLK is 'H' or the

simultaneous change of CLK and DATA, that will be a false operation because of undistinguished condition from the

completion/start of serial data transfer).

After the beginning of serial data transmission, the total number of data bytes that can be transferred are not limited.

(3) The byte format of data transmission (The sequence of data transmission)

a. The byte format during data setting to M65669FP are shown as follows.

In right after the forming of serial data transmitting state, the slave address 24h (00100100b) is transferred. Afterwards,

the internal register address (1 byte) and setting data (by 1 byte unit) are transferred successively. Several bytes of setting

data can be handled in the one transmission. In this operation, the setting data are written into the address register whose

address is increased one in initially transferred internal register address.

b. The byte format during data reading from M65669FP are shown as follows.

Before data reading from M65669FP, whose internal address need to be set by the data reading/transmitting. After the

data reading/transmitting, the operation of "serial data transmission completion and start" (described in (1)) is necessary.

Continuously, the slave address 25h (00100101b) is sent, and then the inverted read out data are available on ACK.

Several bytes of writing data can be handled in the one transmission, too. In this operation, the setting data also are written

into the address register whose address is increased one in initially transferred internal register address.

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