LT1641(RevD) データシートの表示（PDF） - Linear Technology
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LT1641 Datasheet PDF : 12 Pages
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LT1641
APPLICATIO S I FOR ATIO
VIN
24V
SHORT
PIN
R1
49.9k
1%
R2
3.4k
1%
RS
0.025Ω
Q1
IRF530
D1
R5
CMPZ
10Ω
5248B
5%
C1
R6, 10nF
1k, 5%
8
VCC
1
ON
7
SENSE
6
GATE
LT1641
2
FB
3
PWRGD
+
VOUT
R3
CL
59k
1%
R7
24k
5%
R4
3.57k
1%
PWRGD
TIMER
GND
5
4
C2
0.68µF
GND
1641 F05
Figure 5. Typical Application
Figure 6. Power-Up Waveforms
To prevent excessive power dissipation in the pass tran-
sistor and to prevent voltage spikes on the input supply
during short-circuit conditions at the output, the current
folds back as a function of the output voltage, which is
sensed at the FB pin (Figure 7).
When the voltage at the FB pin is 0V, the current limit
circuit drives the GATE pin to force a constant 12mV drop
across the sense resistor. As the output voltage at the FB
pin increases, the voltage across the sense resistor in-
creases until the FB pin reaches 0.5V, at which point the
voltage across the sense resistor is held constant at 47mV.
The maximum current limit is calculated as:
ILIMIT = 47mV/RSENSE
For a 0.025Ω sense resistor, the current limit is set at
1.88A and folds back to 480mA when the output is shorted
to ground.
The LT1641 also features a variable overcurrent response
time. The time required for the chip to regulate the GATE
pin (Pin 6) voltage is a function of the voltage across the
sense resistor connected between the VCC pin (Pin 8) and
the SENSE pin (Pin 7). The larger the voltage, the faster the
gate will be regulated. Figure 8 shows the response time
as a function of overdrive at the SENSE pin.
8
TIMER
The TIMER pin (Pin 5) provides a method for program-
ming the maximum time the chip is allowed to operate in
current limit. When the current limit circuitry is not active,
the TIMER pin is pulled to GND by a 3µA current source.
After the current limit circuit becomes active, an 80µA pull-
up current source is connected to the TIMER pin and the
voltage will rise with a slope equal to 77µA/CTIMER as long
as the current limit circuit remains active. Once the desired
maximum current limit time is set, the capacitor value is:
C(nF) = 62 • t(ms).
If the current limit circuit turns off, the TIMER pin will be
discharged to GND by the 3µA current source.
Whenever the TIMER pin reaches 1.233V, the GATE pin is
immediately pulled to GND and the TIMER pin is pulled
back to GND by the 3µA current source. The part is not
allowed to turn on again until the voltage at the TIMER pin
falls below 0.5V.
The waveform in Figure 9 shows how the output turns off
following a short-circuit. The drop across the sense resis-
tor is held at 12mV as the timer ramps up. Since the output
did not rise bringing FB above 0.5V, the circuit turns off.
1641fd
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