LT1641CS8(RevD) データシートの表示（PDF） - Linear Technology

部品番号

コンポーネント説明

メーカー

LT1641CS8
(Rev.:RevD)

Positive High Voltage Hot Swap Controller

Linear Technology 

APPLICATIO S I FOR ATIO

VCC – VSENSE

47mV

12mV

0V

0.5V

VFB

1641 F07

Figure 7. Current Limit Sense Voltage vs Feedback Pin Voltage

LT1641

12µs

RESPONSE TIME

10µs

8µs

6µs

4µs

2µs

50mV

100mV

150mV

200mV

VCC – VSENSE

1641 F08

Figure 8. Response Time to Overcurrent

Automatic Restart

To force the LT1641 to automatically restart after an

overcurrent fault, the bottom plate of capacitor C1 can be

tied back to the ON pin (Figure 10).

When an overcurrent condition occurs, the GATE pin is

driven to maintain a constant voltage across the sense

resistor. The capacitor C2 at the TIMER pin will begin to

charge. When the voltage at the TIMER pin reaches

1.233V, the GATE pin is immediately pulled to GND and

transistor Q1 turns off. Capacitor C1 momentarily pulses

the ON pin low and allows the part to turn off. When the

voltage at the TIMER pin ramps back down to 0.5V, the

LT1641 turns on again. If the short-circuit condition at the

output still exists, the cycle will repeat itself indefinitely

with a 3.75% on-time duty cycle which prevents Q1 from

overheating. The waveforms are shown in Figure 11.

Undervoltage and Overvoltage Detection

The ON pin can be used to detect an undervoltage condi-

tion at the power supply input. The ON pin is internally

connected to an analog comparator with 80mV of hyster-

esis. If the ON pin falls below its threshold voltage (1.233V),

the GATE pin is pulled low and is held low until ON is high

again.

Figure 12 shows an overvoltage detection circuit. When

the input voltage exceeds the Zener diode’s breakdown

voltage, D2 turns on and starts to pull the TIMER pin high.

After the TIMER pin is pulled higher than 1.233V, the fault

latch is set and the GATE pin is pulled to GND immediately,

turning off transistor Q1. The waveforms are shown in

Figure 13. Operation is restored either by interrupting

power or by pulsing ON low.

Power Good Detection

The LT1641 includes a comparator for monitoring the

output voltage. The noninverting input (FB pin) is com-

pared against an internal 1.233V precision reference and

exhibits 80mV hysteresis. The comparator’s output

(PWRGD pin) is an open collector capable of operating

from a pull-up as high as 100V.

The PWRGD pin can be used to directly enable/disable a

power module with an active high enable input. Figure 14

shows how to use the PWRGD pin to control an active low

enable input power module. Signal inversion is accom-

plished by transistor Q2 and R7.

Supply Transient Protection

The LT1641 is 100% tested and guaranteed to be safe

from damage with supply voltages up to 100V. However,

spikes above 100V may damage the part. During a short-

circuit condition, the large change in currents flowing

through the power supply traces can cause inductive

voltage spikes which could exceed 100V. To minimize the

spikes, the power trace parasitic inductance should be

minimized by using wider traces or heavier trace plating

and a surge suppressor placed between VCC and GND.

1641fd

9

Share Link: