LB1824 データシートの表示（PDF） - SANYO -> Panasonic

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LB1824

Power Brushless Motor Driver for OA Equipment

SANYO -> Panasonic 

LB1824

LB1824 Functional Description (including external components)

1.Speed control circuit

The LB1824 uses a combination of a speed discriminator circuit and a PLL circuit for speed control. The speed

discriminator circuit outputs an error signal once every two FG periods using a charge pump method. The PLL circuit

outputs a phase error signal once every FG period also using a charge pump method. As compared with earlier speed

control methods that used only a speed discriminator circuit, the combination of both a PLL circuit as well as a speed

discriminator circuit employed in the LB1824 results in improved suppression of speed variations in cases where

motors with large load variations are used. Since the FG servo frequency determined as shown in the formula below,

the motor speed is set by the FG pulse count and the crystal oscillator frequency.

fFG(servo) = fOSC/8192

fOSC = crystal oscillator frequency

2.Direct PWM drive

The LB1824 adopts a direct PWM drive method in order to reduce the power loss at the output. The output transistor is

always saturated when on, and it adjusts the motor drive power by varying the duty that the output is on. Since the

output switching is performed by the lower side transistor, Schottky diodes (D1, D2 and D3) must be attached between

OUT and VCC. (This is because if diodes with a short reverse recovery time are not used, through current will flow at

the instant that the lower side transistor turns on.) Normal forward current diodes can be used for the diodes between

OUT and GND.

3.Current control circuit

The current control circuit performs its control operation with a current determined by I = 0.5/Rf. (This limits the peak

current.) The control operation functions to reduce the on duty and thus suppress the current. No phase compensation

capacitor is required.

4. Speed locking range

The speed locking range is within ±6.25% of the set speed, and when the motor speed enters the locking range the

LD pin goes low (open collector output). When the motor speed is outside the locking range, the motor drive output

on duty is changed according to the speed error, thus implementing the control required to return the motor speed to

within the locking range.

5. PWM frequency

The PWM frequency is determined by the resistor R3 and the capacitor C6 that are attached to the CR pin.

• When R3 is connected to the 4 V fixed voltage power supply:

fPWM ≈ 1/(1.2 × C × R)

• When R3 is connected to the 7 V fixed voltage power supply:

fPWM ≈ 1/(0.5 × C × R)

Do not use a resistor of less than 30 kΩ for R3. A PWM frequency of about 15 kHz is desirable. If the PWM

frequency is too low, the motor could oscillate at the PWM frequency during motor constraint and become noisy

since the oscillation will be in the audible frequency range. On the other hand, if the PWM frequency is too high, the

output transistor switching time loss will increase.

6. Ground leading

GND1 (pin 22):

GND2 (pin 11):

ground for blocks other than the output block

output block ground

Connect D4, D5 and D6 to GND2. All other external components should be connected to GND1. The GND1 and

GND2 leads should be grounded at a single point at the connector. Since GND2 carries a large current, its lead

should be as short as possible.

No. 4264-6/9

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