LX1563IDMT データシートの表示（PDF） - Microsemi Corporation

部品番号

コンポーネント説明

メーカー

LX1563IDMT

SECOND-GENERATION POWER FACTOR CONTROLLER

Microsemi Corporation 

PRODUCT DATABOOK 1996/1997

SECOND-GENERATION POWER FACTOR CONTROLLER

PRODUCTION DATA SHEET

LX1562/1563

BLOCK DIAGRAM / PIN DESCRIPTIONS

VIN

8

L1

5.2V (1562)

2.1V (1563)

MULT

IN

3

13.1V (1562)

9.8V (1563)

Internal

Bias

2.5V

REF

VREF

6.8V To All

Internal Circuitry

M1

1.24V

AC

Input

EMI

Filter

M2

IDET 300Ω

5

L1

1.72V

UVLO

C.S.

LATCH

R

VREF

Q

VTIMER

S

Q

1µs

Delay

1.8V

C1

L1

VREF

D1

E.A. INV.

1

2

E.A. OUT

VIN

OUT

7

C.S.

C.S.

4

FUNCTIONAL DESCRIPTION

Pin # Description

VIN

GND

8 Input supply voltage.

6 Input supply voltage return. Must always be the lowest potential of all the pins.

INV 1 Inverting input of the Error Amplifier. The output of the Boost converter should be resistively divided to 2.5V and

connected to this pin.

E.A. OUT 2 The output of the Error Amplifier. A feedback compensation network is placed between this pin and the INV pin.

MULT IN 3 Input to the multiplier stage. The full-wave rectified AC is divided to less than 2V and is connected to this pin.

C.S. 4 Input to the PWM comparator. Current is sensed in the Boost stage MOSFET by a resistor in the source lead, and is

fed to this pin. An internal blanking circuit eliminates the RC low pass filter that otherwise is required to eliminate leading

edge spike.

IDET

5 A current driven logic input with internal clamp.

A second winding on the Boost inductor senses the flyback voltage associated with the zero crossing of the inductor

current and feeds it to the I pin through a limiting resistor. Low on this pin causes V (pin 7) to go high.

DET

O

OUT 7 PWM output pin. A totem-pole output stage specially designed for direct driving the MOSFET.

Copyright © 1996

Rev. 1.3 12/96

5

Share Link: