NJU6475B データシートの表示（PDF） - Japan Radio Corporation

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NJU6475B

12-Character 4-Line Dot Matrix Low Power LCD Controller Driver with key Scan Function

Japan Radio Corporation  

NJU6475B

FUNCTIONAL DESCRIPTION

(1) Description for each blocks

(1-1) Register

The NJU6475B incorporates three 8-bit registers, an instruction register (IR), and a Data Register (DR), Key

Register (KR). The register (IR) stores an instruction code such as "clear display" and "cursor shift" or address

data for Display Data RAM (DD RAM), Character Generator RAM (CG RAM) and Icon Display RAM (MK RAM).

The MPU can write the instruction code and address data to the register (IR), but it cannot read out from

register (IR). The Register (DR) is a temporary register, the data stored in the Register (DR) is written into

DD RAM, MK RAM. A register from these two registers is selected by the register select signal (RS). Register

(KR) is an only temporary register for key scan data. This Register (KR) can read out the contents when

selected Key signal at "H" signal. And non relation ship with signal of register select (RS).

The Relation ship with RS, R/W register as shown below.

<Table-1> Register selection

RS R/W

Operation

0 0 IR write & internal register operation mode

(Clear Display etc...)

0 1 Read out (KR)

1 0 Write (DR) & internal register operation mode

(DR DD RAM/CG RAM/MK RAM)

1 1 Read out (KR)

(1-2) Address Counter (AC)

The address counter (AC) addresses the DD RAM, CG RAM or MK RAM. When the address setting instruc-

tion is written into register (IR), the address information is transferred from register (IR) to the address counter

(AC). The selection of DD RAM, CG RAM or MK RAM is also determined by this instruction.

After writing (or reading) the display data to (or from) the DD RAM, CG RAM or MK RAM, the address counter

(AC) increments (or decrements) automatically.

(1-3) Display Data RAM (DD RAM)

The display data RAM (DD RAM) consisting of 48 x 8 bits stores up to 48-character display data represented

in 8-bit code.

The DD RAM address data set in the address counter (AC) is represented in Hexadecimal code.

upper order bit lower order bit

AC AC6 AC5 AC4 AC3 AC2 AC1 AC0

hexadecimal

hexadecimal

(Example) DD RAM Address "08"

0

001000

0

8

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