SY100E195JI データシートの表示（PDF） - Micrel

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SY100E195JI

PROGRAMMABLE DELAY CHIP

Micrel 

Micrel, Inc.

Precison Edge®

SY10E195

SY100E195

AC ELECTRICAL CHARACTERISTICS

VEE = VEE (Min.) to VEE (Max.); VCC = GND

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

Parameter

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Condition

tPD

Propagation Delay to Output

ps

—

IN to Q; Tap = 0

1210 1360 1510 1240 1390 1540 1440 1590 1765

IN to Q; Tap = 127

3320 3570 3820 3380 3630 3880 3920 4270 4720

EN to Q; Tap = 0

1250 1450 1650 1275 1475 1675 1350 1650 1950

D7 to CASCADE

300 450 700 300 450 700 300 450 700

tRANGE Programmable Range

2000 2175 — 2050 2240 — 2375 2580 — ps

—

tPD (max.) – tPD (min.)

∆t

Step Delay

D0 High

D1 High

D2 High

D3 High

D4 High

D5 High

D6 High

ps

6

— 17

— — 17.5 — — 21 —

— 34

— — 35 — — 42 —

55 68 105 55 70 105 65 84 120

115 136 180 115 140 180 140 168 205

250 272 325 250 280 325 305 336 380

505 544 620 515 560 620 620 672 740

1000 1088 1190 1030 1120 1220 1240 1344 1450

Lin

Linearity

D1 D0

— D1 D0 — D1 D0 — —

7

tskew

Duty Cycle Skew, tPHL–tPLH — ±30 — — ±30 — — ±30 — ps

1

tS

Set-up Time

D to LEN

D to IN

EN to IN

ps

200 0

— 200 0 — 200 0 —

800 —

— 800 — — 800 — —

2

200 —

— 200 — — 200 — —

3

tH

Hold Time

LEN to D

IN to EN

ps

500 250 — 500 250 — 500 250 —

0

—

—

0

——

0

——

4

tR

Release Time

EN to IN

SET MAX to LEN

SET MIN to LEN

ps

300 —

— 300 — — 300 — —

5

800 —

— 800 — — 800 — —

800 —

— 800 — — 800 — —

tjit

Jitter

— <5

— — <5 — — <5 — ps

8

tr

Rise/Fall Times

ps

—

tf

20–80% (Q)

125 225 325 125 225 325 125 225 325

20–80% (CASCADE)

300 450 650 300 450 650 300 450 650

Notes:

2. Duty cycle skew guaranteed only for differential operation measured from the cross point of the input to the cross point of the output.

3. This set-up time defines the amount of time prior to the input signal the delay tap of the device must be set.

4. This set-up time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than ±75mV to

that IN/IN transition.

5. This hold time is the minimum time that EN must remain asserted after a negative going IN or positive going IN to prevent an output response greater than

±75mV to that IN/IN transition.

6. This release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets the specified

IN to Q propagation delay and transition times.

7. Specification limits represent the amount of delay added with the assertion of each individual delay control pin. The various combinations of asserted delay

control inputs will typically realize D0 resolution steps across the specified programmable range.

8. The linearity specification guarantees to which delay control input the programmable steps will be monotonic (i.e. increasing delay steps for increasing

binary counts on the control inputs Dn). Typically, the device will be monotonic to the D0 input, however, under worst case conditions and process variation,

delays could decrease slightly with increasing binary counts when the D0 input is the LSB. With the D1 input as the LSB, the device is guaranteed to be

monotonic over all specified environmental conditions and process variation.

9. The jitter of the device is less than what can be measured without resorting to very tedious and specialized measurement techniques.

M9999-032006

hbwhelp@micrel.com or (408) 955-1690

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