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8254 データシートの表示(PDF) - Intel

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8254 Datasheet PDF : 21 Pages
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8254
Symbol
D7 – D0
CLK 0
OUT 0
GATE 0
GND
VCC
WR
RD
CS
A1 A0
CLK 2
OUT 2
GATE 2
CLK 1
GATE 1
OUT 1
Pin
No
1–8
9
10
11
12
24
23
22
21
20 – 19
18
17
16
15
14
13
Type
IO
I
O
I
I
I
I
I
I
O
I
I
I
O
Table 1 Pin Description
Name and Function
DATA Bi-directional three state data bus lines connected to system
data bus
CLOCK 0 Clock input of Counter 0
OUTPUT 0 Output of Counter 0
GATE 0 Gate input of Counter 0
GROUND Power supply connection
POWER a5V power supply connection
WRITE CONTROL This input is low during CPU write operations
READ CONTROL This input is low during CPU read operations
CHIP SELECT A low on this input enables the 8254 to respond to
RD and WR signals RD and WR are ignored otherwise
ADDRESS Used to select one of the three Counters or the Control
Word Register for read or write operations Normally connected to
the system address bus
A1
A0
Selects
0
0
Counter 0
0
1
Counter 1
1
0
Counter 2
1
1
Control Word Register
CLOCK 2 Clock input of Counter 2
OUT 2 Output of Counter 2
GATE 2 Gate input of Counter 2
CLOCK 1 Clock input of Counter 1
GATE 1 Gate input of Counter 1
OUT 1 Output of Counter 1
FUNCTIONAL DESCRIPTION
General
The 8254 is a programmable interval timer counter
designed for use with Intel microcomputer systems
It is a general purpose multi-timing element that can
be treated as an array of I O ports in the system
software
The 8254 solves one of the most common problems
in any microcomputer system the generation of ac-
curate time delays under software control Instead of
setting up timing loops in software the programmer
configures the 8254 to match his requirements and
programs one of the counters for the desired delay
After the desired delay the 8254 will interrupt the
CPU Software overhead is minimal and variable
length delays can easily be accommodated
Some of the other counter timer functions common
to microcomputers which can be implemented with
the 8254 are
 Real time clock
 Event-counter
 Digital one-shot
 Programmable rate generator
 Square wave generator
 Binary rate multiplier
 Complex waveform generator
 Complex motor controller
Block Diagram
DATA BUS BUFFER
This 3-state bi-directional 8-bit buffer is used to in-
terface the 8254 to the system bus (see Figure 3)
2

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