SL4019BD データシートの表示（PDF） - System Logic Semiconductor

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SL4019BD

Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS

System Logic Semiconductor 

SL4019B

AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200KΩ, Input tr=tf=20 ns)

Symbol

tPLH, tPHL

Parameter

Maximum Propagation Delay, Input A, B, SA or

Sb to Output Y (Figure 1)

tTLH, tTHL Maximum Output Transition Time, Any Output

(Figure 1)

CIN Maximum Input Capacitance All A and B

Inputs

Sa and Sb

Inputs

VCC

Guaranteed Limit

V ≥-55°C 25°C ≤125°C Unit

5.0 300

300

600

ns

10

120

120

240

15

100

100

200

5.0 200

200

400

ns

10

100

100

200

15

80

80

160

-

7.5

pF

-

15.0

pF

Figure 1. Switching Waveforms

EXPANDED LOGIC DIAGRAM

(1/4 of the Device)

SLS

System Logic

Semiconductor

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