MPC855T データシートの表示（PDF） - Motorola => Freescale

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MPC855T

MPC860 Family Hardware Specifications

Motorola => Freescale 

Power Dissipation

2 Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board horizontal.

3 Per JEDEC JESD51-6 with the board horizontal.

4 Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is

measured on the top surface of the board near the package.

5 Indicates the average thermal resistance between the die and the case top surface as measured by the cold plate

method (MIL SPEC-883 Method 1012.1) with the cold plate temperature used for the case temperature. For exposed

pad packages where the pad would be expected to be soldered, junction to case thermal resistance is a simulated

value from the junction to the exposed pad without contact resistance.

6 Thermal characterization parameter indicating the temperature difference between package top and the junction

temperature per JEDEC JESD51-2.

Part V Power Dissipation

Table 5-4 provides power dissipation information. The modes are 1:1, where CPU and bus

speeds are equal, and 2:1 mode, where CPU frequency is twice bus speed.

Table 5-4. Power Dissipation (PD)

Die Revision

Frequency (MHz) Typical 1 Maximum 2 Unit

A.3 and Previous

25

450

40

700

50

870

B.1 and C.1

33

375

50

575

66

750

D.3 and D.4

(1:1 Mode)

50

656

66

TBD

D.3 and D.4

(2:1 Mode)

66

722

80

851

1 Typical power dissipation is measured at 3.3 V.

2 Maximum power dissipation is measured at 3.5 V.

550

mW

850

mW

1050

mW

TBD

mW

TBD

mW

TBD

mW

735

mW

TBD

mW

762

mW

909

mW

NOTE

Values in Table 5-4” represent VDDL-based power dissipation

and do not include I/O power dissipation over VDDH. I/O power

dissipation varies widely by application due to buffer current,

depending on external circuitry.

8

MPC860 Family Hardware Specifications

MOTOROLA

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