MAX4538CSE データシートの表示（PDF） - Maxim Integrated

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MAX4538CSE

Quad, Low-Voltage, SPST Analog Switches with Enable

Maxim Integrated 

Quad, Low-Voltage,

SPST Analog Switches with Enable

______________________________________________Test Circuits/Timing Diagrams

MAX4536

MAX4537

MAX4538

SWITCH

INPUT

VCOM

COM

LOGIC

INPUT

IN, EN

GND

0V

V+

V+

NO

or NC

V-

V-

SWITCH

OUTPUT

VOUT

RL

CL

300Ω

35pF

CL INCLUDES FIXTURE AND STRAY CAPACITANCE.

( ) VOUT = VCOM

RL

RL + RON

Figure 1. Switching Time

+3V

LOGIC

INPUT 0V

50%

tr < 20ns

tf < 20ns

SWITCH 0V

OUTPUT

tOFF

VOUT 0.9 x V0UT

tON

0.9 x VOUT

LOGIC INPUT WAVEFORMS INVERTED FOR EN AND SWITCHES

THAT HAVE THE OPPOSITE LOGIC SENSE.

MAX4538

VCOM1 = +3V

VCOM2 = +3V

COM1

COM2

IN

V+

V+

NO1

N02

VOUT2 RL1

RL2

CL2

LOGIC

INPUT

GND

V-

V-

RL = 300Ω

CL INCLUDES FIXTURE AND STRAY CAPACITANCE. CL = 35pF

Figure 2. Break-Before-Make Interval (MAX4538 only)

VOUT1

CL1

LOGIC +3V

INPUT

0V

SWITCH

OUTPUT 1

(VOUT1)

0V

SWITCH

OUTPUT 2

(VOUT2)

0V

50%

0.9 x V0UT1

0.9 x VOUT2

tD

tD

MAX4536

MAX4537

MAX4538

RGEN

COM

VGEN

GND

V+

V+

NC or

NO

IN V-

V-

VIN = +3V

Figure 3. Charge Injection

VOUT

CL

VOUT

IN

OFF

∆VOUT

OFF

ON

ON

OFF

OFF

IN

Q = (∆VOUT)(CL)

IN DEPENDS ON SWITCH CONFIGURATION;

INPUT POLARITY DETERMINED BY SENSE OF SWITCH.

_______________________________________________________________________________________ 9

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