MX809J データシートの表示（PDF） - MX-COM Inc
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MX809J Datasheet PDF : 22 Pages
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MSK Modem
11
MX809
Reading
MSB
Bit 7
0
1
6
0
1
5
0
1
4
0
1
3
0
1
2
0
1
1
0
1
0
0
1
Status Bits
Received First
Undefined
“0” or
“1”
Undefined
“0” or
“1”
RX SYNC Detect
SYNC
RX SYNC Detect
SYNC
TX Idle
Idle
TX Data Ready
TX Date Ready
RX Checksum True
True
RX Data Ready
RX Data Ready
Table 8: Status Register
5.8 Interrupt Request
The conditions that cause interrupts to be output (if enabled by the Control Register) from the MX809 are:
TX Idle
TX Data Ready
RX SYNC Detect
RX Data Ready
RX SYNC Detect
The Status Register should be read to find the cause of the interrupt. Interrupts are cleared by (1) reading the
Status Register, or (2) changing the state of the RX / TX bit.
5.9 General Reset
Upon power-up, the bits in the MX809 Mode register and buffer will be random (either “0” or “1”). The
General Reset command (01H) will “reset” all microcircuits in the C-BUS and had the following effect on the
MX809.
All bits in the Control Register will be set to logic “0”. The Tx Out output will be set to VBIAS.
Note: The Status register, RX Data Buffer, TX Data Buffer, and SYNC Program register are not affected by
the General Reset Command.
1998 MX-COM, Inc.
www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480036.004
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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