QL901M-6PS680I データシートの表示（PDF） - QuickLogic Corporation
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QL901M-6PS680I Datasheet PDF : 37 Pages
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Design Tools Platform Support
• QuickWorks, the complete product suite, supports Windows 95/98/NT/2000. It includes SpDE
(layout including place & route, timing analysis, and back-annotation), Synplify-Lite (synthesis), Turbo
Writer (HDL-enhanced text editor), etc.
• QuickTool supports Solaris. It has only the layout software (SpDE).
• QuickMIPS simulation is enabled through either:
• a SmartModel (VMC-generated model, encrypted RTL, relatively slow). This option supports both
Verilog and VHDL.
• SaiLAhead co-verification platform from Saivision (very fast C model). This option only supports
Verilog (no VHDL) at this time.
Synthesis
Layout
Simulation
Table 2: Design Tools Platform Support
Solaris
Windows NT Windows 2000
Synplify-Lite
X (in QuickWorks) X (in QuickWorks)
SpDE
X (in QuickTool) X (in QuickWorks) X (in QuickWorks)
ModelSim/VCS
X
X
SmartModel
Verilog XL/NC
X
ModelSim
X
X
SaiLAhead
Verilog XL/NC
X
Linux
X
X
SaiLAhead Platform
The “SaiLAhead for QuickMIPS” co-verification platform is tailored for QuickMIPS devices. It enables
simulation of user-defined logic functions that are to be implemented in the QuickMIPS programmable
fabric with the rest of the QuickMIPS fixed system logic functions, which verifies overall QuickMIPS
functionality. Simultaneously, the SaiLAhead platform has a powerful, feature-rich debugger, which
enables QuickMIPS users to develop and debug their application code (C and MIPS assembly). The
SaiLAhead platform accelerates the speed of simulation of the QuickMIPS device in a simulator such as
NC-Verilog by using C models for various fixed system logic functions in the QuickMIPS device. This
platform also provides a standalone C environment offering additional speed-up of simulation of the
entire QuickMIPS design. Please refer to http://www.saivision.com for more information on the
SaiLAhead platform.
QL901M QuickMIPS™ Data Sheet Rev B
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