CD4073BMS データシートの表示（PDF） - Intersil

部品番号

コンポーネント説明

メーカー

CD4073BMS

CMOS AND Gate

Intersil 

CD4073BMS, CD4081BMS, CD4082BMS

VDD

*

8 (5, 11)

p

p

n

*

p

1 (4, 12)

n

*

p

2 (3, 13)

VDD

n

p

p

p

p

n

n

n

n

n

VSS

VSS

ALL INPUTS PROTECTED BY

CMOS PROTECTION NETWORK

FIGURE 1. SCHEMATIC DIAGRAM FOR CD4073BMS (1 OF 3 IDENTICAL GATES)

A

1 (4, 12)

B

2 (3, 13)

C

8 (5, 11)

J

9 (6, 10)

9 (6, 10)

FIGURE 2. LOGIC DIAGRAM FOR CD4073BMS (1 OF 3 IDENTICAL GATES)

VDD

VDD

p

*

2 (5, 9, 12)

n

p

*

1 (6, 8, 13)

n

p

p

p

n

n

n

p

VSS

3 (4, 10, 11)

n

* ALL INPUTS PROTECTED BY

CMOS PROTECTION NETWORK

VSS

FIGURE 3. SCHEMATIC DIAGRAM FOR CD4081BMS (1 OF 4 IDENTICAL GATES)

A

1 (6, 8, 13)

B

2 (5, 9, 12)

J

3 (4, 10, 11)

FIGURE 4. LOGIC DIAGRAM FOR CD4081BMS (1 OF 4 IDENTICAL GATES)

7-439

Share Link: