HS-2420RH データシートの表示（PDF） - Intersil
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HS-2420RH Datasheet PDF : 8 Pages
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HS-2420RH
Test Circuits
VDC
ALL RESISTORS = ±1%
ALL CAPACITORS = ±10%
10kΩ
+VCC -VCC S/H
100kΩ
2 S2 1
50Ω
1
50Ω
2
2
S1
1
S6
VAC
50Ω
2
1
S7
1
S7
2
-
DUT
+
A
GND
1
S4
2 100kΩ
1 OPEN 3
S5
CH =
S3 2 1 50pF
2kΩ
1000pF
3
+VCC
1MΩ
NULL
- AMP
+
ILOAD
-
+
X1
X-1
BUFFER
AOUT
EOUT
4
3
2
S8 1
FIGURE 1. TEST FIXTURE SCHEMATIC (SWITCH POSITIONS S1 - S8 DETERMINE CONFIGURATION)
+5V
SINEWAVE
INPUT
IN2 EN
IN1
IN3
IN4
IN5
OUT
IN6
IN7
IN8
A2
A1 A0
+15V -15V
-
+
DUT
2kΩ
VIN
CH =
1000pF
VOUT
50pF
+15V -15V
DUT
-
+
2kΩ
50Ω
S/H
CH =
1000pF
VOUT
50pF
SAMPLE/HOLD
CONTROL INPUT
NOTE: Compute Hold Mode Feedthrough Attenuation from the
Formula:
Feedthrough A t t e n u a t i o n
=
20
log
V----V-O---I-U-N---T--H----HO---O-L---DL---D--
Where VOUT HOLD = Peak-Peak Value of Output Sinewave during
the Hold Mode.
FIGURE 2. HOLD MODE FEEDTHROUGH ATTENUATION
NOTE: GBWP is the Frequency of VINPUT at which:
20
log
V---V--I--NO----P-U---U-T---T-
=
–3dB
FIGURE 3. GAIN BANDWIDTH PRODUCT
2
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