5962F9683001VPC データシートの表示（PDF） - Intersil
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5962F9683001VPC Datasheet PDF : 9 Pages
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HS-1145RH
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (RS) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the RS and CL
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
RS and CL form a low pass network at the output, thus
limiting system bandwidth well below the amplifier bandwidth
of 270MHz (for AV = +1). By decreasing RS as CL increases
(as illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. In spite of this, the
bandwidth decreases as the load capacitance increases. For
example, at AV = +1, RS = 62Ω, CL = 40pF, the overall
bandwidth is limited to 180MHz, and bandwidth drops to
75MHz at AV = +1, RS = 8Ω, CL = 400pF.
50
VH
1
+IN
OUT
V+
VL V-
GND
FIGURE 2A. TOP LAYOUT
40
30
20
AV = +1
AV = +2
10
0
0
50 100 150 200 250 300 350 400
LOAD CAPACITANCE (pF)
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
Evaluation Board
The performance of the HS-1145RH may be evaluated using
the HFA11XX Evaluation Board.
The layout and schematic of the board are shown in Figure 2.
The VH connection may be used to exercise the DISABLE
pin, but note that this connection has no 50Ω termination. To
order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.
FIGURE 2B. BOTTOM LAYOUT
510
R1
1
50Ω
2
IN
3
4
10µF 0.1µF
-5V
510
VH
8
7
6
5
GND
0.1µF
50Ω
10µF
+5V
OUT
VL
GND
FIGURE 2C. SCHEMATIC
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
3
FN4227.2
February 14, 2005
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