BYTE#1
A0-A16/(A17)
WP#
CE#
OE#
WE#
RP#
VCC
VPP
2Mb
SMART 3 BOOT BLOCK FLASH MEMORY
FUNCTIONAL BLOCK DIAGRAM
I/O
Control
Logic
A9
Addr.
Buffer/
Latch
18 (19)
Power
(Current)
Control
Addr.
Counter
Command
Execution
Logic
State
Machine
VPP
Switch/
Pump
Status
Register
Input
8
Buffer
9
9
(10)
16KB Boot Block
8KB Parameter Block
8KB Parameter Block
96KB Main Block
128KB Main Block
7
Input
Buffer
Input Data
Latch/Mux
16
Input
Buffer
A-1
Y-
Decoder
Identification
Register
Y - Select Gates
Sense Amplifiers
Write/Erase-Bit
Compare and Verify
DQ15
7
8
8
Output
Buffer
Output
Buffer
Output
Buffer
7
8
DQ15/(A - 1)1
DQ8-DQ141
DQ0-DQ7
NOTE: 1. Does not apply to MT28F002B3.
2Mb Smart 3 Boot Block Flash Memory
F48.p65 – Rev. 1/00
3
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©2000, Micron Technology, Inc.