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MCM6341 データシートの表示(PDF) - Motorola => Freescale

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MCM6341
Motorola
Motorola => Freescale Motorola
MCM6341 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
WRITE CYCLE 1 (W Controlled; See Notes 1, 2, 3, and 4)
MCM6341–10 MCM6341–11 MCM6341–12 MCM6341–15
Parameter
Symbol Min Max Min Max Min Max Min Max Unit Notes
Write Cycle Time
Address Setup Time
Address Valid to End of Write
Address Valid to End of Write (G
High)
tAVAV
10
11
12
15
ns
5
tAVWL
0
0
0
0
ns
tAVWH
9
10
10
12
ns
tAVWH
8
9
9
10
ns
Write Pulse Width
tWLWH
9
10
10
12
ns
tWLEH
Write Pulse Width (G High)
tWLWH
8
9
9
10
ns
tWLEH
Data Valid to End of Write
tDVWH
4
5
5
6
ns
Data Hold Time
tWHDX
0
0
0
0
ns
Write Low to Data High–Z
tWLQZ
0
5
0
6
0
6
0
7
ns
6, 7, 8
Write High to Output Active
tWHQX
3
3
3
3
ns
6, 7, 8
Write Recovery Time
tWHAX
0
0
0
0
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. E1, E2, and E3 are represented by E in this data sheet. E2 is of opposite polarity to E1 and E3.
5. All write cycle timings are referenced from the last valid address to the first transitioning address.
6. Transition is measured ± 200 mV from steady–state voltage.
7. This parameter is sampled and not 100% tested.
8. At any given voltage and temperature, tWLQZ max < tWHQX min both for a given device and from device to device.
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1 (W Controlled; See Notes 1, 2, 3, and 4)
tAVAV
tAVWL
HIGH–Z
tAVWH
tWLWH
tWLEH
tWLQZ
tDVWH
DATA VALID
HIGH–Z
tWHAX
tWHDX
tWHQX
MOTOROLA FAST SRAM
MCM6341
7

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