IDT79R3500 データシートの表示（PDF） - Integrated Device Technology
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IDT79R3500 Datasheet PDF : 16 Pages
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IDT79R3500 RISC CPU PROCESSOR RISCore
PIN CONFIGURATION
MILITARY AND COMMERCIAL TEMPERATURE RANGES
GND
GND
Reset
Bus Error
RdBusy
WrBusy
CpBusy
Int(5)
Int(4)
Int(3)
Int(2)
Int(1)
Int (0)
VCC
AdrLo(17)
VCC
AdrLo(16)
VCC
CpCond(1)
CpCond(0)
FPInt
AdrLo(15)
Mode
AdrLo(14)
VCC
AdrLo(13)
VCC
VCC
AdrLo(12)
GND
AdrLo(11)
GND
AdrLo(10)
GND
AdrLo(9)
AdrLo(8)
AdrLo(7)
AdrLo(6)
AdrLo(5)
VCC
80
81
120
121
160 Pin EIAJ
MQUAD
Top Side View
(Cavity Down)
41
40
CpSync
MemRd
MemWr
DWr(1)
DWr(2)
IWr(1)
IWr(2)
DRd(1)
DRd(2)
IRd(1)
IRd(2)
GND
IClk
GND
DClk
SysOut
Clk2xRd
Clk2xSys
VCC
Clk2xSmp
Clk2xPhi
Exception
GND
Data(30)
GND
Data(29)
GND
XEn
VCC
Data(28)
VCC
Data(27)
VCC
DataP(3)
Data(31)
Data(26)
Data(25)
Data(24)
Data(22)
1
160
Data(21)
NOTE:
1. AdrLo 16 and 17 are multifunction pins which are controlled by mode select programming on interrupt pins at reset time
AdrLo 16: MP Invalidate, CpCond (2).
AdrLo 17: MP Stall, CpCond (3).
2. This package is pin-compatible with the 175-pin PGA for the R3000A.
2860 drw 14a
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