PM5381 データシートの表示（PDF） - PMC-Sierra

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PM5381

SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S

PMC-Sierra 

PRELIMINARY

DATASHEET

PMC-2000489

ISSUE 1

PMC-Sierra, Inc.

PM5381 S/UNI-2488

SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S

CONTENTS

1 FEATURES ............................................................................................................................................1

1.1 GENERAL..........................................................................................................................................1

1.2 SONET SECTION AND LINE / SDH REGENERATOR AND MULTIPLEXER SECTION...................................2

1.3 SONET PATH / SDH HIGH ORDER PATH ...........................................................................................3

1.4 THE RECEIVE ATM PROCESSOR........................................................................................................3

1.5 THE RECEIVE POS PROCESSOR........................................................................................................4

1.6 THE TRANSMIT ATM PROCESSOR......................................................................................................4

1.7 THE TRANSMIT POS PROCESSOR......................................................................................................4

2 APPLICATIONS.....................................................................................................................................6

3 REFERENCES.......................................................................................................................................7

4 DEFINITIONS.........................................................................................................................................9

5 APPLICATION EXAMPLES ................................................................................................................10

6 BLOCK DIAGRAM ..............................................................................................................................13

7 DESCRIPTION.....................................................................................................................................17

8 PIN DIAGRAMS...................................................................................................................................19

9 SDPIN DESCRIPTION.........................................................................................................................20

9.1

9.2

9.3

9.4

9.5

9.6

9.7

9.8

9.9

9.10

9.11

SERIAL LINE SIDE INTERFACE SIGNALS (7) .......................................................................................20

CLOCKS AND ALARMS (7).................................................................................................................21

RECEIVE SECTION/LINE/PATH OVERHEAD EXTRACTION SIGNALS (6) .................................................23

TRANSMIT SECTION/LINE/PATH OVERHEAD INSERTION SIGNALS (7)...................................................24

SYSTEM SIDE UTOPIA AND POS SIGNALS (84) .................................................................................28

APS SERIAL DATA INTERFACE (20) ..................................................................................................37

MICROPROCESSOR INTERFACE SIGNALS (37) ...................................................................................39

JTAG TEST ACCESS PORT (TAP) SIGNALS (5) .................................................................................40

ANALOG MISCELLANEOUS SIGNALS (10)...........................................................................................41

ANALOG POWER AND GROUND (107) ...............................................................................................42

DIGITAL POWER AND GROUND..........................................................................................................44

10 FUNCTIONAL DESCRIPTION.........................................................................................................50

10.1

10.2

10.3

10.4

10.5

10.6

RECEIVE LINE INTERFACE ................................................................................................................50

SONET/SDH RECEIVE LINE INTERFACE (SRLI)...............................................................................51

RECEIVE REGENERATOR AND MULTIPLEXOR PROCESSOR (RRMP) ...................................................51

RECEIVE TAIL TRACE PROCESSOR (RTTP) ......................................................................................53

RECEIVE HIGH ORDER PATH PROCESSOR (RHPP)...........................................................................54

SONET/SDH VIRTUAL CONTAINER ALIGNER (SVCA) ......................................................................62

Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use

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