LTC1292 データシートの表示（PDF） - Linear Technology
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LTC1292 Datasheet PDF : 24 Pages
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LTC1292/LTC1297
TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Clock Rate vs
Source Resistance
1.0
VCC = 5V
VREF = 5V
0.8
CLK = 1MHz
+VIN + +IN
0.6
RSOURCE – –IN
0.4
0.2
0
100
1k
10k
RSOURCE– (Ω)
100k
LTC1292/7G13
Input Channel Leakage Current vs
Temperature
1000
900
GUARANTEED
800
700
600
500
400
300
200
ON CHANNEL
100
OFF CHANNEL
0
–50 –30 –10 10 30 50 70 90 110 130
AMBIENT TEMPERATURE (°C)
LTC1292/7 G16
Maximum Filter Resistor vs
Cycle Time
10k
RFILTER
+VIN
+
1k
CFILTER ≥1µF
–
100
10
Sample-and-Hold Acquisition
Time vs Source Resistance
100
VREF = 5V
VCC = 5V
TA = 25°C
0V TO 5V INPUT STEP
10
+ RSOURCE
+VIN
–
1
10
100
1k
10k
CYCLE TIME (µs)
LTC1292/7 G14
Noise Error vs Reference Voltage
2.25
LTC1292/LTC1297
2.00 NOISE = 200µVP-P
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
0
1
2
3
4
5
REFERENCE VOLTAGE (V)
LTC1292/7 G17
1
100
1000
10000
RSOURCE+ (Ω)
LTC1292/7 G15
* MAXIMUM CLK FREQUENCY REPRESENTS THE
CLK FREQUENCY AT WHICH A 0.1LSB SHIFT IN
THE ERROR AT ANY CODE TRANSITION FROM ITS
1MHz VALUE IS FIRST DETECTED.
** MAXIMUM RFILTER REPRESENTS THE FILTER
RESISTOR VALUE AT WHICH A 0.1LSB CHANGE IN
FULL SCALE ERROR FROM ITS VALUE AT
RFILTER = 0Ω IS FIRST DETECTED.
PI FU CTIO S
# PIN
FUNCTION
DESCRIPTION
1
CS
Chip Select Input
A logic low on this input enables the LTC1292/LTC1297. Power shutdown is activated on the LTC1297 when
CS is brought high.
2, 3 +IN, –IN Analog Inputs
These inputs must be free of noise with respect to GND.
4
GND
Analog Ground
GND should be tied directly to an analog ground plane.
5
VREF
6
DOUT
7
CLK
Reference Input
Digital Data Output
Shift Clock
The reference input defines the span of the A/D converter and must be kept free of noise with respect to GND.
The A/D conversion result is shifted out of this output.
This clock synchronizes the serial data transfer.
8
VCC
Positive Supply
This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
6
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