PIC18F010T-I/SN データシートの表示（PDF） - Microchip Technology

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PIC18F010T-I/SN

High Performance Microcontrollers

Microchip Technology 

PIC18F010/020

FIGURE 1-1:

PIC18F010/020 BLOCK DIAGRAM

Data Bus<8>

21

Address Latch

Program Memory

(4 Kbytes)

Data Latch

21 Table Pointer<21>

inc/dec logic

88

20

PCLATU PCLATH

PCU PCH PCL

Program Counter

31 Level Stack

Data Latch

Data RAM

256 bytes

Address Latch

12

Address<12>

4

12

4

BSR FSR0 Bank0,F

FSR1

FSR2

12

Table Latch

16

8

ROM Latch

Decode

inc/dec

logic

IR

Instruction

Decode &

Control

OSC2/CLKOUT

OSC1/CLKIN

Timing

Generation

Internal

Oscillator

Power-up

Timer

Oscillator

Start-up Timer

Power-on

Reset

Watchdog

Timer

Brown-out

Reset

Test Mode

Select

8

PRODH PRODL

3

BITOP

8

8 x 8 Multiply

8

W

8

8

8

ALU<8>

8

PORTB

BOR

PLVD

Timer0

MCLR VDD, VSS

RB0/ICSPDAT

RB1/ICSPCLK

RB2/T0CKI/INT0

RB3/MCLR/VPP

RB4/OSC2/CLKOUT

RB5/OSC1/CLKIN

EEDATA

64 bytes

DATA

EEPROM

EEADDR

DS41142A-page 4

Preliminary

 2001 Microchip Technology Inc.

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