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VSC9112 データシートの表示(PDF) - Vitesse Semiconductor

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VSC9112 Datasheet PDF : 36 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
STS-48c Physical Layer
Packet/ATM Over SONET/SDH Device
Datasheet
VSC9112
Functional Overview
The VSC9112 is a dual mode SONET/SDH to Packet/ATM framing device. In the Packet over SONET
(POS) mode, this device can be used in equipment interconnecting IP/PPP/HDLC equipment over public or pri-
vate SONET/SDH networks. Similarly, in the ATM over SONET (ATM) mode, this device can be used in
equipment interconnecting ATM switches. Features of the VSC9112 include: full insertion/extraction of the
transport overhead, bit error rate and extensive SONET/packet/cell performance monitoring, packet/cell filter-
ing and discarding functionalities, JTAG TAP controller, and an 8-bit CPU interface with 8 general purpose I/O
ports.
When used in conjunction with a high-speed mux/demux tranceiver, this device provides a complete physi-
cal layer solution for Packet/ATM over SONET/SDH, LAPS (ITU COM 7-224), and certain Ethernet over
SONET/SDH applications at the STS-48 rate. In addition, this device provides the interface for higher band-
width applications at the STS-192/STM-64 rate.
Line Interface (LIF)
• A parity bit, programmable for even/odd parity, is provided each for the incoming and outgoing datapaths.
• A reference clock output derived from the receive clock input can be programmed to be 8kHz, 19MHz,
38MHz, or 78MHz frequency locked to the receive clock.
• A reference clock output derived from the transmit clock input can be programmed to be 8kHz, 19MHz,
38MHz, or 78MHz frequency locked to the transmit clock.
• A Loss of Optical Carrier (LOPC) input signal is provided for monitoring and alarm purposes.
• The TLSYNC, RLFP and TLFP signals are intended to be used in STS-192/STM-64 applications.
Receive Section Overhead Processor (RSOP)
• Two mechanisms for frame alignment are provided. One is based on searching for A1/A2 framing pat-
terns and the other uses an external frame pulse (RLFP). The latter is intended for STS-192 applications.
• 12/24/48-bit A1/A2 framing patterns are supported.
• Out Of Frame (OOF) and Loss Of Frame (LOF) alarm condition are detected.
• The incoming data stream is optionally descrambled using the generating polynomial 1 + x6 + x7 with a
sequence length of 127.
• Section BIP-8 (B1) errors are detected and accumulated. Both individual and block mode accumulation
of B1 error indications are supported.
• The incoming data stream, before descrambling, is monitored for absence of transitions or “all-zero pat-
terns”. The Loss Of Signal (LOS) detection and termination criterias are programmable.
• It is possible to force insertion of all “1” in the data stream, except for the Section overhead. The Line
AIS (AIS-L) condition may be automatically inserted in case of LOS, LOF, or Loss of Optical Carrier
(LOPC) alarm events.
• It is possible to extract the entire Section overhead through the Receive Overhead Access Port (ROAP).
Page 2
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52210-0, Rev. 4.3
3/30/00

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