GS832218C-133I データシートの表示（PDF） - Giga Semiconductor

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GS832218C-133I

2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs

Giga Semiconductor 

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GS832218(B/C)/GS832236(B/C)/GS832272(C)

GS832218/36/72 209-Bump BGA Pin Description

Pin Location

D6

A7

A5, A6

P6

L6

T6

N6

G6

H6, J6, K6, M6

B6

Symbol

G

ADV

ADSP, ADSC

ZZ

FT

LBO

SCD

MCH

MCL

BW

F6

ZQ

W3

W4

W8

W9

E5, E6, E7, G5, G7, J5, J7, L5, L7, N5, N7, R5,

R6, R7

D3, D9, F3, F4, F5, F7, F8, F9, H3, H4, H5, H7,

H8, H9, K5, K7, M3, M4, M5, M7, M8, M9, P3,

P4, P5, P7, P8, P9, T3, T9

E3, E4, E8, E9, G3, G4, G8, G9, J3, J4, J8, J9,

L3, L4, L8, L9, N3, N4, N8, N9, R3, R4, R8, R9

TMS

TDI

TDO

TCK

VDD

VSS

VDDQ

Type

I

I

I

I

I

I

I

I

I

I

I

I

O

I

I

I

I

Description

Output Enable; active low

Burst address counter advance enable; active low

Address Strobe (Processor, Cache Controller); active low

Sleep Mode control; active high

Flow Through or Pipeline mode; active low

Linear Burst Order mode; active low

Single Cycle Deselect/Dual Cycle Deselect Mode Control

Must Connect High

Must Connect Low

Byte Enable; active low

FLXDrive Output Impedance Control

(Low = Low Impedance [High Drive], High = High Impedance [Low

Drive])

Scan Test Mode Select

Scan Test Data In

Scan Test Data Out

Scan Test Clock

Core power supply

I/O and Core Ground

Output driver power supply

Rev: 1.00 10/2001

6/44

© 2001, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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