DS2141A
DS2141A
T1 Controller
FEATURES
• DS1/ISDN–PRI framing transceiver
• Frames to D4, ESF, and SLC–96 formats
• Parallel control port
• Onboard, dual two–frame elastic store slip buffers
• Extracts and inserts robbed–bit signaling
• Programmable output clocks
• Onboard FDL support circuitry
• 5V supply; low–power CMOS
• Available in 40–pin DIP and 44–pin PLCC (DS2141Q)
• Compatible with DS2186 Transmit Line Interface,
DS2187 Receive Line Interface, DS2188 Jitter Atten-
uator, DS2290 T1 Isolation Stik, and DS2291 T1 Long
Loop Stik.
PIN ASSIGNMENT
TCLK 1
TSER 2
40 VDD
39 TSYNC
TCHCLK 3
TPOS 4
TNEG 5
38 TLINK
37 TLCLK
36 INT1
AD0 6
AD1 7
AD2 8
AD3 9
AD4 10
AD5 11
AD6 12
35 INT2
34 RLOS/LOTC
33 TCHBLK
32 RCHBLK
31 LI_CS
30 LI_CLK
29 LI_SDI
AD7 13
BTS 14
28 SYSCLK
27 RNEG
RD(DS) 15
CS 16
26 RPOS
25 RSYNC
ALE(AS) 17
24 RSER
WR(R/W) 18
23 RCHCLK
RLINK 19
22 RCLK
VSS 20
21 RLCLK
40–PIN DIP (600 MIL)
DESCRIPTION
The DS2141A is a comprehensive, software–driven T1
framer. It is meant to act as a slave or coprocessor to a
microcontroller or microprocessor. Quick access via
the parallel control port allows a single micro to handle
many T1 lines. The DS2141A is very flexible and can be
configured into numerous orientations via software.
The software orientation of the device allows the user to
modify their design to conform to future T1 specification
changes. The controller contains a set of 62 8–bit inter-
nal registers which the user can access. These internal
registers are used to configure the device and obtain in-
formation from the T1 link. The device fully meets all of
the latest T1 specifications including ANSI
T1.403–1989, AT&T TR 62411 (12–90), and CCITT
G.704 and G.706.
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
BTS
RD (DS)
NC
6 5 4 3 2 1 44 43 42 41 40
7
39
8
38
9
37
10
36
11
35
12
44–PIN PLCC
34
13
33
14
32
15
31
16
30
17
29
1819 202122 2324 25 26 27 28
RLOS/LOTC
TCHBLK
RCHBLK
LI_CS
LI_CLK
LI_SDI
NC
NC
SYSCLK
RNEG
RPOS
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