PM4541 データシートの表示（PDF） - PMC-Sierra

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PM4541

T1XC EVALUATION DAUGHTER BOARD

PMC-Sierra 

TELECOM STANDARD PRODUCT

PMC-920314

ISSUE 2

PMC-Sierra, Inc.

PM4541 T1XC-EVBD

T1XC EVALUATION DAUGHTERBOARD

GND

RDLCLK/

RDLEOM

RDLSIG/

RDLINT

RCLKI

RDP/ RDD/

SDP

G J15-7

O J13-1

O J13-2

I J13-3

I/O J13-4

J16-7

J14-1

J14-2

J14-3

J14-4

RDN/ RLCV/ I/O J13-5

SDN

J14-5

GND

BTPCM/

BTDP

BTSIG/

BTDN

BTFP

BTCLK

GND

G J13-6

I J11-4

I J11-3

I J11-2

I J11-1

G J11-5

J14-6

J12-4

J12-3

J12-2

J12-1

J12-5

BRCLK

BRFPI

BRPCM/

BRDP

BRSIG/

BRDN

BRFPO

RDPCM/

RPCM

RCLKO

RFP

GND

I J17-1

I J17-2

O J17-3

O J17-4

O J17-5

O J17-6

O J17-7

O J17-8

G J17-9

J18-1

J18-2

J18-3

J18-4

J18-5

J18-6

J18-7

J18-8

J18-9

3.2.4 Prototype Chip Select Header

T1XC Digital Transmit Ground Reference

Receive Data Link Clock/ Receive Data

Link End of Message

Receive Data Link Signal/ Receive Data

Link Interrupt

Receive Line Clock Input

Receive Digital Positive Line Pulse/

Receive Digital DS-1 Signal/ Sliced

Positive Line Pulse

Receive Digital Negative Line Pulse/

Receive Line Code Violation Indication/

Sliced Negative Line Pulse

Backplane Transmit PCM/ Backplane

Transmit Positive Line Pulse

Backplane Transmit Signaling/ Backplane

Transmit Negative Line Pulse

Backplane Transmit Frame Pulse

Backplane Transmit Clock

Backplane Transmit Header Ground

Reference

Backplane Receive Clock

Backplane Frame Pulse Input

Backplane Receive PCM/ Backplane

Receive Positive Line Pulse

Backplane Receive Signaling/ Backplane

Receive Negative Line Pulse

Backplane Frame Pulse Output

Recovered Decoded PCM/ Recovered

PCM

Recovered PCM Clock Output

Receive Frame Pulse

Backplane Receive Ground Reference

Two unused chip selects from the decoding logic are provided on a header near the

prototype area.

10

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