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3933 データシートの表示(PDF) - Allegro MicroSystems

部品番号
コンポーネント説明
メーカー
3933
Allegro
Allegro MicroSystems Allegro
3933 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
3933
GHC 5
CC 6
GLB 7
SB 8
GHB 9
CB 10
GLA 11
SA 12
GHA 13
29 SENSE
28 RC
27 PWM
26 BRKSEL
25 BRKCAP
24 BRAKE
1293 DIR
22 H2
21 H3
Dwg. PP-068
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Supply Voltage, VBB ............................. 28 V
(peak) .............................................. 30 V
Terminal Voltage, VCCOUT ................. 13.2 V
(peak) .............................................. 15 V
Logic Input Voltage Range,
VIN .................. -0.3 V to VLCAP + 0.3 V
Sense Voltage Range,
VSENSE ............................. -5 V to VLCAP
Output Voltage Range,
VSA, VSB, VSC .................. -5 V to +30 V
VGHA, VGHB, VGHC . -5 V to VBB + 14 V
VCA, VCB, VCC ..................... VSX + 14 V
Operating Temperature Range,
TA ................................. -20°C to +85°C
Junction Temperature, TJ ................. +150°C
Storage Temperature Range,
TS ............................... -55°C to +150°C
THREE-PHASE POWER
MOSFET CONTROLLER
The A3933SEQ is a three-phase MOSFET controller for use with
bipolar brushless dc motors. It drives all n-channel external power
FETs, allowing system cost savings and minimizing r(DS)on power loss.
The high-side drive block is implemented with bootstrap capacitors at
each output to provide the floating positive supply for the gate drive.
The high-side circuitry also employs a unique “intelligent” FET
monitoring circuit that ensures the gate voltages are at the proper levels
before turn-on and during the ON cycle. This device is targeted for
applications with motor supplies from 12 V to 28 V.
Internal fixed off-time PWM current-control circuitry can be used to
regulate the maximum load current to a desired value. The peak load-
current limit is set by the user’s selection of an input reference voltage
and external sensing resistor. The fixed off-time pulse duration is set
by a user-selected external RC timing network.
A power-loss braking circuit brakes the motor on an under-voltage
condition. The device is configured to either coast or dynamically
brake the motor when this occurs.
The A3933SEQ is supplied in a 32-lead rectangular (9 x 7) plastic
chip carrier (quad pack) for minimum-area, surface-mount applica-
tions.
FEATURES AND BENEFITS
I Drives External N-Channel FETs
I Intelligent High-Side Gate Drive
I Selectable Coast or Dynamic Brake on Power Down
I Adjustable Dead Time for Cross-Conduction Protection
I Selectable Fast or Slow Current-Decay Modes
I Internal PWM Peak Current Control
I Reset/Coast Input
I 120° Hall Commutation with Internal Pullup
I Internal 5-V Regulator
I Low-Side Synchronous Rectification
I Direction Control
I PWM Speed-Control Input
I Fault-Diagnostic Output
I Under-Voltage Protection

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