3933 データシートの表示（PDF） - Allegro MicroSystems

部品番号

コンポーネント説明

メーカー

3933

THREE-PHASE POWER MOSFET CONTROLLER

Allegro MicroSystems 

3933

THREE-PHASE POWER

MOSFET CONTROLLER

Terminal Descriptions (cont’d)

FAULT — Open-drain output to indicate fault condition; will

go active high for any of the following:

1 – invalid HALL input code,

2 – high-side, gate-source voltage less than 7 V,

3 – bootstrap capacitor not sufficiently charged, or

4 – under-voltage condition detected at VCCOUT.

The fault state for gate-source and bootstrap monitors are

cleared at each commutation. If the motor has stalled, then the

fault can only be cleared by toggling the RESET terminal or

power-up sequence.

MODE — A logic input to set current-decay method, internally

pulled up to VLCAP (+5 V). When in slow-decay mode (logic

HIGH), only the high-side FET is switched open during a PWM

OFF cycle. The fast-decay mode (logic LOW) switches both

the source and sink FETs.

H1/H2/H3 — Hall-sensor inputs; internally pulled up to VLCAP

(+5 V). Configured for 120° electrical spacing.

DIR — A logic input to reverse rotation, see commutation logic

table. Internally pulled up to VLCAP (+5 V).

BRAKE — A logic input to short out the motor windings for a

braking function. A logic HIGH will turn ON the low-side

FETs, turn OFF the high-side FETs. Internally pulled up to

VLCAP (+5 V). The braking torque applied will depend on the

speed.

BRKCAP — Connection for reservoir capacitor. This terminal

is used to provide a positive power supply for the sink-drive

outputs for a power-down condition. This will allow predict-

able braking, if desired. A blocking diode to VCCOUT is re-

quired. A 4.7 µF capacitor will provide 6.5 V gate drive for

300 ms. If a power-down braking option is not needed

(BRKSEL = LOW) then this terminal should be tied to VCCOUT.

BRKSEL — A logic input to enable/disable braking on power-

down condition. Internally pulled up to VLCAP (+5 V). If held

low, the motor will coast on a power-down condition.

PWM — Speed control input, internally pulled up to VLCAP

(+5 V). A logic LOW turns OFF all drivers, a logic HIGH will

turn ON selected drivers as determined by H1/H2/H3 input

logic. Holding the terminal high allows speed/torque control

solely by the current-limit circuit via REF analog voltage

command.

RC — An analog input used to set the fixed off time with an

external resistor (RT) and capacitor (CT). The tblank time is

controlled by the value of the external capacitor (see Applica-

tions Information). As a rule, the fixed off time should not be

less than 10 µs. The resistor should be in the range of 10 kΩ to

100 kΩ.

SENSE — An analog input to the current-limit comparator.

A voltage representing load current appears on this terminal

during ON time, when it reaches REF voltage, the comparator

trips and load current decays for the fixed off-time interval.

Voltage transients seen at this terminal when the drivers turn

ON are ignored for time tblank.

REF — An analog input to the current-limit comparator.

Voltage applied here sets the peak load current.

Ipeak = VREF/RS.

VCCOUT — A regulated 12 V output; supply for low-side gate

drive and bootstrap capacitor charge circuits. It is good practice

to connect a decoupling capacitor from this terminal to AGND,

as close to the device terminals as possible. The terminal

should be shorted to VBB for 12 V applications.

VBB — The A3933 supply voltage. It is good practice to

connect a decoupling capacitor from this terminal to AGND, as

close to the device terminals as possible. This terminal should

be shorted to VCCOUT for 12 V applications.

LCAP — Connection for decoupling capacitor for the internal

5 V reference. This terminal can source no more than 2 mA.

DEAD — An analog input. A resistor between DEAD and

LCAP is selected to adjust turn-off to turn-on time. This delay

is needed to prevent shoot-through in the external power FETs.

The allowable resistor range is 20 kΩ to 430 kΩ, which

converts to deadtime of 210 ns to 2.1 µs, using the following

equation:

tDEAD = (6.75 x 10-12 x RDEAD) + (75 x 10-9).

AGND — The low-level (analog) reference point for the

A3933.

PGND — The reference point for all low-side gate drivers.

115 Northeast Cutoff, Box 15036

Worcester, Massachusetts 01615-0036 (508) 853-5000

Share Link: