Philips Semiconductors
ThunderBird Q3D PCI Audio
Accelerator
Product Specification
SAA7780
DCD#
RI#
152
I-T
UART Data Carrier Detect
The status of this input can be determined by reading bit 7 of the
Modem Status Register. When MSR[7] is read, it will be the inverted
value of DCD#. A change in status of DCD# sets the Delta DCD bit
in the Modem Status Register.
If the DCD# line changes state while the modem status interrupts
are enabled, an interrupt will be generated.
153
I-T
UART Ring Indicator
The status of this input can be determined by reading bit 6 of the
Modem Status Register. When MSR[6] is read, it will be the inverted
value of RI#. Bit 2 (TERI) of the Modem Status Register indicates
whether the RI# input signal has changed from a low to a high, since
the previous reading of the Modem Status Register.
If modem status interrupts are enabled when MSR[6] changes from
a 1 to a 0, an interrupt will be generated.
Joystick/Game Port
JACX
9
JACY
13
JBCX
10
JBCY
12
JAB[2:1]
7
JBB[2:1]
14
I/O-C,S
Joystick A X Axis
Joystick A X-position.
I/O-C,S
Joystick A Y Axis
Joystick A Y-position.
I/O-C,S
Joystick B X Axis
Joystick B X-position.
I/O-C,S
Joystick B Y Axis
Joystick B Y-position.
I-T
Joystick A Button Interface
Joystick A buttons. These buttons are internally de-bounced and de-
glitched using a low speed clock and metastable hardened flip-flops.
I-T
Joystick B Button Interface
Joystick B buttons. These buttons are internally de-bounced and de-
glitched using a low speed clock and metastable hardened flip-flops.
1999 Sep 30
21